| % effective in both single- and two- level index |
| \index{Coherence|see{Cache coherence}} |
| \index{Full(y) multi-copy atomic|see{Multi-copy atomic}} |
| \index{Memory consistency model|see{Memory model}} |
| \index{Single-copy atomic|see{Cache coherence}} |
| \index{Single-variable SC|see{Cache coherence}} |
| \IfIndexHier{ % effective only in two-level index |
| \index{Armv7 memory model|see{Memory model, Armv7}} |
| \index{Armv8 memory model|see{Memory model, Armv8}} |
| \index{Address dependency|see{Dependency, address}} |
| \index{Anti-heisenbug|see{Heisenbug, anti-}} |
| \index{Associativity|see{Cache associativity}} |
| \index{Associativity miss|see{Cache miss, associativity}} |
| \index{Bounded wait free|see{Wait free, bounded}} |
| \index{Bounded population-oblivious wait free|see{Wait free, bounded population-oblivious}} |
| \index{C11 memory model|see{Memory model, C11}} |
| \index{Cache-invalidation latency|see{Latency, cache-invalidation}} |
| \index{Cache-miss latency|see{Latency, cache-miss}} |
| \index{Capacity miss|see{Cache miss, capacity}} |
| \index{Code locking|see{Locking, code}} |
| \index{Communication miss|see{Cache miss, communication}} |
| \index{Control dependency|see{Dependency, control}} |
| \index{Data dependency|see{Dependency, data}} |
| \index{Data locking|see{Locking, data}} |
| \index{Direct-mapped cache|see{Cache, direct-mapped}} |
| \index{Exclusive lock|see{Lock, exclusive}} |
| \index{Full memory barrier|see{Memory barrier, full}} |
| \index{Fully associative cache|see{Cache, fully associative}} |
| \index{Grace-period latency|see{Latency, grace-period}} |
| \index{Itanium memory model|see{Memory model, Itanium}} |
| \index{Linux kernel memory consistency model (LKMM)|see{Memory model, Linux kernel}} |
| \index{Memory latency|see{Latency, memory}} |
| \index{Memory-barrier latency|see{Latency, memory-barrier}} |
| \index{Memory-barrier overhead|see{Overhead, memory-barrier}} |
| \index{Message latency|see{Latency, message}} |
| \index{MIPS memory model|see{Memory model, MIPS}} |
| \index{Non-multi-copy atomic|see{Multi-copy atomic, non-}} |
| \index{Other-multi-copy atomic|see{Multi-copy atomic, other-}} |
| \index{Process consistency|see{Memory consistency, process}} |
| \index{RCU read-side critical section|see{Critical section, RCU read-side}} |
| \index{Read memory barrier|see{Memory barrier, read}} |
| \index{Read-side critical section|see{Critical section, read-side}} |
| \index{Reader-writer lock|see{Lock, reader-writer}} |
| \index{Scheduling latency|see{Latency, scheduling}} |
| \index{Sequence lock|see{Lock, sequence}} |
| \index{Sequential consistency|see{Memory consistency, sequential}} |
| \index{Weak consistency|see{Memory consistency, weak}} |
| \index{Write memory barrier|see{Memory barrier, write}} |
| \index{Write miss|see{Cache miss, write}} |
| \index{Write-side critical section|see{Critical section, write-side}} |
| \index{x86 memory model|see{Memory model, x86}} |
| }{ % effective for single-level index |
| \index{Linux kernel memory consistency model (LKMM)|see{Linux kernel memory model}} |
| \index{Process consistency|see{Process memory consistency}} |
| \index{Sequential consistency|see{Sequential memory consistency}} |
| \index{Weak consistency|see{Weak memory consistency}} |
| } |
