)]}'
{
  "commit": "5f0b819995e172f48fdcd91335a2126ba7d9deae",
  "tree": "8e83ba4c380ce0e546fb8702e7d688f180cb4646",
  "parents": [
    "844a5fe219cf472060315971e15cbf97674a3324"
  ],
  "author": {
    "name": "Paolo Bonzini",
    "email": "pbonzini@redhat.com",
    "time": "Wed Mar 09 14:28:02 2016 +0100"
  },
  "committer": {
    "name": "Paolo Bonzini",
    "email": "pbonzini@redhat.com",
    "time": "Thu Mar 10 11:26:10 2016 +0100"
  },
  "message": "KVM: MMU: fix reserved bit check for ept\u003d0/CR0.WP\u003d0/CR4.SMEP\u003d1/EFER.NX\u003d0\n\nKVM has special logic to handle pages with pte.u\u003d1 and pte.w\u003d0 when\nCR0.WP\u003d1.  These pages\u0027 SPTEs flip continuously between two states:\nU\u003d1/W\u003d0 (user and supervisor reads allowed, supervisor writes not allowed)\nand U\u003d0/W\u003d1 (supervisor reads and writes allowed, user writes not allowed).\n\nWhen SMEP is in effect, however, U\u003d0 will enable kernel execution of\nthis page.  To avoid this, KVM also sets NX\u003d1 in the shadow PTE together\nwith U\u003d0, making the two states U\u003d1/W\u003d0/NX\u003dgpte.NX and U\u003d0/W\u003d1/NX\u003d1.\nWhen guest EFER has the NX bit cleared, the reserved bit check thinks\nthat the latter state is invalid; teach it that the smep_andnot_wp case\nwill also use the NX bit of SPTEs.\n\nCc: stable@vger.kernel.org\nReviewed-by: Xiao Guangrong \u003cguangrong.xiao@linux.inel.com\u003e\nFixes: c258b62b264fdc469b6d3610a907708068145e3b\nSigned-off-by: Paolo Bonzini \u003cpbonzini@redhat.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "95a955de5964bcc3f4aa6791a004e29b28504c13",
      "old_mode": 33188,
      "old_path": "arch/x86/kvm/mmu.c",
      "new_id": "1e7a49bfc94fb323cbb11782693cab89743f1133",
      "new_mode": 33188,
      "new_path": "arch/x86/kvm/mmu.c"
    }
  ]
}