)]}'
{
  "commit": "ee293f4771c97525eb9f2069685f8d3057025a88",
  "tree": "712bbee271eaf13c9d529bf76be18d90498a469e",
  "parents": [
    "73c454bd6f5f8056361e5c39188e526cf5dabe1d",
    "37f4e1f77de7626258fafb23b835bb369c5e0dfb"
  ],
  "author": {
    "name": "Palmer Dabbelt",
    "email": "palmer@rivosinc.com",
    "time": "Thu May 08 10:20:52 2025 -0700"
  },
  "committer": {
    "name": "Palmer Dabbelt",
    "email": "palmer@rivosinc.com",
    "time": "Thu May 08 10:24:11 2025 -0700"
  },
  "message": "Merge the non-KVM parts of Clement\u0027s misaligned access support patch set\n\nThe SBI Firmware Feature extension allows the S-mode to request some\nspecific features (either hardware or software) to be enabled. This\nseries uses this extension to request misaligned access exception\ndelegation to S-mode in order to let the kernel handle it. It also adds\nsupport for the KVM FWFT SBI extension based on the misaligned access\nhandling infrastructure.\n\nFWFT SBI extension is part of the SBI V3.0 specifications [1]. It can be\ntested using the qemu provided at [2] which contains the series from\n[3]. Upstream kvm-unit-tests can be used inside kvm to tests the correct\ndelegation of misaligned exceptions. Upstream OpenSBI can be used.\n\nNote: Since SBI V3.0 is not yet ratified, FWFT extension API is split\nbetween interface only and implementation, allowing to pick only the\ninterface which do not have hard dependencies on SBI.\n\nThe tests can be run using the kselftest from series [4].\n\n$ qemu-system-riscv64 \\\n\t-cpu rv64,trap-misaligned-access\u003dtrue,v\u003dtrue \\\n\t-M virt \\\n\t-m 1024M \\\n\t-bios fw_dynamic.bin \\\n\t-kernel Image\n ...\n\n # ./misaligned\n TAP version 13\n 1..23\n # Starting 23 tests from 1 test cases.\n #  RUN           global.gp_load_lh ...\n #            OK  global.gp_load_lh\n ok 1 global.gp_load_lh\n #  RUN           global.gp_load_lhu ...\n #            OK  global.gp_load_lhu\n ok 2 global.gp_load_lhu\n #  RUN           global.gp_load_lw ...\n #            OK  global.gp_load_lw\n ok 3 global.gp_load_lw\n #  RUN           global.gp_load_lwu ...\n #            OK  global.gp_load_lwu\n ok 4 global.gp_load_lwu\n #  RUN           global.gp_load_ld ...\n #            OK  global.gp_load_ld\n ok 5 global.gp_load_ld\n #  RUN           global.gp_load_c_lw ...\n #            OK  global.gp_load_c_lw\n ok 6 global.gp_load_c_lw\n #  RUN           global.gp_load_c_ld ...\n #            OK  global.gp_load_c_ld\n ok 7 global.gp_load_c_ld\n #  RUN           global.gp_load_c_ldsp ...\n #            OK  global.gp_load_c_ldsp\n ok 8 global.gp_load_c_ldsp\n #  RUN           global.gp_load_sh ...\n #            OK  global.gp_load_sh\n ok 9 global.gp_load_sh\n #  RUN           global.gp_load_sw ...\n #            OK  global.gp_load_sw\n ok 10 global.gp_load_sw\n #  RUN           global.gp_load_sd ...\n #            OK  global.gp_load_sd\n ok 11 global.gp_load_sd\n #  RUN           global.gp_load_c_sw ...\n #            OK  global.gp_load_c_sw\n ok 12 global.gp_load_c_sw\n #  RUN           global.gp_load_c_sd ...\n #            OK  global.gp_load_c_sd\n ok 13 global.gp_load_c_sd\n #  RUN           global.gp_load_c_sdsp ...\n #            OK  global.gp_load_c_sdsp\n ok 14 global.gp_load_c_sdsp\n #  RUN           global.fpu_load_flw ...\n #            OK  global.fpu_load_flw\n ok 15 global.fpu_load_flw\n #  RUN           global.fpu_load_fld ...\n #            OK  global.fpu_load_fld\n ok 16 global.fpu_load_fld\n #  RUN           global.fpu_load_c_fld ...\n #            OK  global.fpu_load_c_fld\n ok 17 global.fpu_load_c_fld\n #  RUN           global.fpu_load_c_fldsp ...\n #            OK  global.fpu_load_c_fldsp\n ok 18 global.fpu_load_c_fldsp\n #  RUN           global.fpu_store_fsw ...\n #            OK  global.fpu_store_fsw\n ok 19 global.fpu_store_fsw\n #  RUN           global.fpu_store_fsd ...\n #            OK  global.fpu_store_fsd\n ok 20 global.fpu_store_fsd\n #  RUN           global.fpu_store_c_fsd ...\n #            OK  global.fpu_store_c_fsd\n ok 21 global.fpu_store_c_fsd\n #  RUN           global.fpu_store_c_fsdsp ...\n #            OK  global.fpu_store_c_fsdsp\n ok 22 global.fpu_store_c_fsdsp\n #  RUN           global.gen_sigbus ...\n [12797.988647] misaligned[618]: unhandled signal 7 code 0x1 at 0x0000000000014dc0 in misaligned[4dc0,10000+76000]\n [12797.988990] CPU: 0 UID: 0 PID: 618 Comm: misaligned Not tainted 6.13.0-rc6-00008-g4ec4468967c9-dirty #51\n [12797.989169] Hardware name: riscv-virtio,qemu (DT)\n [12797.989264] epc : 0000000000014dc0 ra : 0000000000014d00 sp : 00007fffe165d100\n [12797.989407]  gp : 000000000008f6e8 tp : 0000000000095760 t0 : 0000000000000008\n [12797.989544]  t1 : 00000000000965d8 t2 : 000000000008e830 s0 : 00007fffe165d160\n [12797.989692]  s1 : 000000000000001a a0 : 0000000000000000 a1 : 0000000000000002\n [12797.989831]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : ffffffffdeadbeef\n [12797.989964]  a5 : 000000000008ef61 a6 : 626769735f6e0000 a7 : fffffffffffff000\n [12797.990094]  s2 : 0000000000000001 s3 : 00007fffe165d838 s4 : 00007fffe165d848\n [12797.990238]  s5 : 000000000000001a s6 : 0000000000010442 s7 : 0000000000010200\n [12797.990391]  s8 : 000000000000003a s9 : 0000000000094508 s10: 0000000000000000\n [12797.990526]  s11: 0000555567460668 t3 : 00007fffe165d070 t4 : 00000000000965d0\n [12797.990656]  t5 : fefefefefefefeff t6 : 0000000000000073\n [12797.990756] status: 0000000200004020 badaddr: 000000000008ef61 cause: 0000000000000006\n [12797.990911] Code: 8793 8791 3423 fcf4 3783 fc84 c737 dead 0713 eef7 (c398) 0001\n #            OK  global.gen_sigbus\n ok 23 global.gen_sigbus\n # PASSED: 23 / 23 tests passed.\n # Totals: pass:23 fail:0 xfail:0 xpass:0 skip:0 error:0\n\nWith kvm-tools:\n\n # lkvm run -k sbi.flat -m 128\n  Info: # lkvm run -k sbi.flat -m 128 -c 1 --name guest-97\n  Info: Removed ghost socket file \"/root/.lkvm//guest-97.sock\".\n\n ##########################################################################\n #    kvm-unit-tests\n ##########################################################################\n\n ... [test messages elided]\n PASS: sbi: fwft: FWFT extension probing no error\n PASS: sbi: fwft: get/set reserved feature 0x6 error \u003d\u003d SBI_ERR_DENIED\n PASS: sbi: fwft: get/set reserved feature 0x3fffffff error \u003d\u003d SBI_ERR_DENIED\n PASS: sbi: fwft: get/set reserved feature 0x80000000 error \u003d\u003d SBI_ERR_DENIED\n PASS: sbi: fwft: get/set reserved feature 0xbfffffff error \u003d\u003d SBI_ERR_DENIED\n PASS: sbi: fwft: misaligned_deleg: Get misaligned deleg feature no error\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature invalid value error\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature invalid value error\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature value no error\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature value 0\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature value no error\n PASS: sbi: fwft: misaligned_deleg: Set misaligned deleg feature value 1\n PASS: sbi: fwft: misaligned_deleg: Verify misaligned load exception trap in supervisor\n SUMMARY: 50 tests, 2 unexpected failures, 12 skipped\n\nThis series is available at [5].\n\nLink: https://github.com/riscv-non-isa/riscv-sbi-doc/releases/download/vv3.0-rc2/riscv-sbi.pdf [1]\nLink: https://github.com/rivosinc/qemu/tree/dev/cleger/misaligned [2]\nLink: https://lore.kernel.org/all/20241211211933.198792-3-fkonrad@amd.com/T/ [3]\nLink: https://lore.kernel.org/linux-riscv/20250414123543.1615478-1-cleger@rivosinc.com [4]\nLink: https://github.com/rivosinc/linux/tree/dev/cleger/fwft [5]\n\n* sbiv3-misaligned-access:\n  RISC-V: KVM: add support for SBI_FWFT_MISALIGNED_DELEG\n  RISC-V: KVM: add support for FWFT SBI extension\n  RISC-V: KVM: add SBI extension reset callback\n  RISC-V: KVM: add SBI extension init()/deinit() functions\n  riscv: misaligned: add a function to check misalign trap delegability\n  riscv: misaligned: move emulated access uniformity check in a function\n  riscv: misaligned: use correct CONFIG_ ifdef for misaligned_access_speed\n  riscv: misaligned: use on_each_cpu() for scalar misaligned access probing\n  riscv: misaligned: request misaligned exception from SBI\n\nLink: https://lore.kernel.org/all/20250424173204.1948385-7-cleger@rivosinc.com/\nSigned-off-by: Palmer Dabbelt \u003cpalmer@rivosinc.com\u003e\n",
  "tree_diff": []
}
