)]}'
{
  "commit": "f043a93fff9e3e3e648b6525483f59104b0819fa",
  "tree": "735578a8dd59bfeebf7b20eb8c287e0e9995b001",
  "parents": [
    "05f7e89ab9731565d8a62e3b5d1ec206485eeb0b"
  ],
  "author": {
    "name": "Cui Chao",
    "email": "cuichao1753@phytium.com.cn",
    "time": "Fri Feb 13 14:03:47 2026 +0800"
  },
  "committer": {
    "name": "Mike Rapoport (Microsoft)",
    "email": "rppt@kernel.org",
    "time": "Sat Feb 14 09:29:12 2026 +0200"
  },
  "message": "mm: numa_memblks: Identify the accurate NUMA ID of CFMW\n\nIn some physical memory layout designs, the address space of CFMW (CXL\nFixed Memory Window) resides between multiple segments of system memory\nbelonging to the same NUMA node. In numa_cleanup_meminfo, these multiple\nsegments of system memory are merged into a larger numa_memblk. When\nidentifying which NUMA node the CFMW belongs to, it may be incorrectly\nassigned to the NUMA node of the merged system memory.\n\nWhen a CXL RAM region is created in userspace, the memory capacity of\nthe newly created region is not added to the CFMW-dedicated NUMA node.\nInstead, it is accumulated into an existing NUMA node (e.g., NUMA0\ncontaining RAM). This makes it impossible to clearly distinguish\nbetween the two types of memory, which may affect memory-tiering\napplications.\n\nExample memory layout:\n\nPhysical address space:\n    0x00000000 - 0x1FFFFFFF  System RAM (node0)\n    0x20000000 - 0x2FFFFFFF  CXL CFMW (node2)\n    0x40000000 - 0x5FFFFFFF  System RAM (node0)\n    0x60000000 - 0x7FFFFFFF  System RAM (node1)\n\nAfter numa_cleanup_meminfo, the two node0 segments are merged into one:\n    0x00000000 - 0x5FFFFFFF  System RAM (node0) // CFMW is inside the range\n    0x60000000 - 0x7FFFFFFF  System RAM (node1)\n\nSo the CFMW (0x20000000-0x2FFFFFFF) will be incorrectly assigned to node0.\n\nTo address this scenario, accurately identifying the correct NUMA node\ncan be achieved by checking whether the region belongs to both\nnuma_meminfo and numa_reserved_meminfo.\n\nWhile this issue is only observed in a QEMU configuration, and no known\nend users are impacted by this problem, it is likely that some firmware\nimplementation is leaving memory map holes in a CXL Fixed Memory Window.\nCXL hotplug depends on mapping free window capacity, and it seems to be\nonly a coincidence to have not hit this problem yet.\n\nFixes: 779dd20cfb56 (\"cxl/region: Add region creation support\")\nSigned-off-by: Cui Chao \u003ccuichao1753@phytium.com.cn\u003e\nCc: stable@vger.kernel.org\nReviewed-by: Jonathan Cameron \u003cjonathan.cameron@huawei.com\u003e\nReviewed-by: Gregory Price \u003cgourry@gourry.net\u003e\nReviewed-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nLink: https://patch.msgid.link/20260213060347.2389818-2-cuichao1753@phytium.com.cn\nSigned-off-by: Mike Rapoport (Microsoft) \u003crppt@kernel.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8f5735fda0a2180ba7c7eae5f1c6e26a08c9b993",
      "old_mode": 33188,
      "old_path": "mm/numa_memblks.c",
      "new_id": "3f53464240e8d43ffd498d058ddb3de494ffed7e",
      "new_mode": 33188,
      "new_path": "mm/numa_memblks.c"
    }
  ]
}