)]}' { "commit": "e994d5eb7c3e45e13eb4fc882a47238f8dc4d63e", "tree": "5ac8f9e943fc3d9b9d46d8b1da37d4cff3c02bbb", "parents": [ "d6720003c3732db891f6b5b10691a9c13ff6c46b" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Wed May 09 16:24:59 2012 +0900" }, "committer": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Sat May 12 22:13:52 2012 +0200" }, "message": "ARM / mach-shmobile: Invalidate caches when booting secondary cores\n\nMake sure L1 caches are invalidated when booting secondary\ncores. Needed to boot all mach-shmobile SMP systems that\nare using Cortex-A9 including sh73a0, r8a7779 and EMEV2.\n\nThanks to imx and tegra guys for actual code.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nTested-by: Kuninori Morimoto \u003ckuninori.morimoto.gx@renesas.com\u003e\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\n", "tree_diff": [ { "type": "modify", "old_id": "6ac015c892060e72b29c2a60735a810762b0c115", "old_mode": 33188, "old_path": "arch/arm/mach-shmobile/headsmp.S", "new_id": "b202c1272526e3f0752b360871016f6f06567aab", "new_mode": 33188, "new_path": "arch/arm/mach-shmobile/headsmp.S" } ] }