a9cfcfcad50c ("drm/nouveau/kms/nv50-gp1xx: disable notifies again after core update")
2806280a0cd7 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core update()")
203f6eaf4182 ("drm/nouveau/kms/nv50-: convert core update() to new push macros")
5bb88d07948b ("drm/nouveau/kms/gv100-: move window ownership setup into modesetting path")
0446f48cb53d ("drm/nouveau/kms/gv100: allow windows to use PACKED8BPP formats")
563737c525ea ("drm/nouveau/kms/tu104: initial support")
facaed62b4cb ("drm/nouveau/kms/gv100: initial support")
2ce7f3862989 ("drm/nouveau/kms/nv50-: initial overlay support")
01d380ab4f70 ("drm/nouveau/kms/gk104-: support additional cursor sizes")
119608a7f3f1 ("drm/nouveau/kms/nv50-: handle degamma LUT from window channels")
e349a05dc8fa ("drm/nouveau/kms/nv50-: plane updates don't always require image_set()")
859b456b6b19 ("drm/nouveau/kms/nv50-: store window visibility in state")
45a2945a3759 ("drm/nouveau/kms/nv50-: simplify swap interval handling")
04fc14be7726 ("drm/nouveau/kms/nv50-: decouple window state changes, and update method submisssion")
53e0a3e70de6 ("drm/nouveau/kms/nv50-: simplify tracking of channel interlocks")
261fcfa96991 ("drm/nouveau/kms/nv50-: extend window image data for stereo/planar formats")
43c181e9deb5 ("drm/nouveau/kms/nv50-: move drm format->hw conversion into common code")
f88bc9d3ecca ("drm/nouveau/kms/nv50-: unify set/clr masks")
9d6c2fe1917f ("drm/nouveau/kms/nv50-: allow specification of valid heads for a window")
ccd27db8c731 ("drm/nouveau/kms/nv50-: split base implementation by hardware class")
09e1b78aab57 ("drm/nouveau/kms/nv50-: split core implementation by hardware class")
1590700d94ac ("drm/nouveau/kms/nv50-: split each resource type into their own source files")
0a3687716bb0 ("drm/nouveau/kms/nv50: abstract OR interfaces so the code can be split")
2ca7fb5c1cc6 ("drm/nouveau/kms/nv50: handle SetControlOutputResource from head")
10ffe0fad533 ("drm/nouveau/kms/nv50-: abstract head interfaces so the code can be split")
9ca6f1ebba10 ("drm/nouveau/kms/nv50: modify core allocation so the code can be split")
d7c6e97a3232 ("drm/nouveau/kms/nv50-: modify base allocation so the code can be split")
b97ace407226 ("drm/nouveau/kms/nv50-: modify cursor allocation so the code can be split")
a97c530eb968 ("drm/nouveau/kms/nv50-: modify overlay allocation so the code can be split")
5bca1621c07c ("drm/nouveau/kms/nv50-: move fb ctxdma tracking into windows")
30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath dispnv50/")
0d4a2c5767dc ("drm/nouveau/kms: move display class instantiation to library")
f5650478ab07 ("drm/nouveau/disp/nv50-: pass nvkm_memory objects for channel push buffers")
8531f5702713 ("drm/nouveau/disp/nv50-: merge handling of pio and dma channels")
9b096283bf78 ("drm/nouveau/disp/nv50-: simplify definiton of core channels")
6d41a7536f8c ("drm/nouveau/disp/nv50-: simplify definition of cursor channels")
3ceeef9c03fc ("drm/nouveau/disp/nv50-: simplify definition of base channels")
c2c3a00310df ("drm/nouveau/disp/nv50-: simplify definition of overlay immediate channels")
46f74a8ad79c ("drm/nouveau/disp/nv50-: simplify definition of overlay channels")
abc1d4379baf ("drm/nouveau/disp/nv50-: replace user object with engine pointer in channels")
bb3b0a422074 ("drm/nouveau/disp/nv50-: initialise from the engine, rather than the user object")
f5e088d6f0b4 ("drm/nouveau/disp/nv50-: fetch mask of available piors during oneinit")
9fe4e177045f ("drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit")
bf5d1a6b6a44 ("drm/nouveau/disp/nv50-: fetch mask of available dacs during oneinit")
f7b2ece37fce ("drm/nouveau/disp/nv50-: fetch mask of available heads during oneinit")
3b9ba66ab0e0 ("drm/nouveau/disp/nv50-: delay subunit construction until oneinit")
81af63a4af82 ("drm: Don't pass clip to drm_atomic_helper_check_plane_state()")
bf817d0cf719 ("drm/armada: Use drm_mode_get_hv_timing() to populate plane clip rectangle")
57270b8191a9 ("drm/armada: Construct a temporary crtc state for plane checks")
4751cf733a11 ("drm/simple_kms_helper: Fix NULL pointer dereference with no active CRTC")