Merge branch 'sunxi/dt-for-7.2' into sunxi/for-next
diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml index 1aa5775..978ef2d 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml
@@ -40,6 +40,12 @@ resets: maxItems: 1 + interconnects: + maxItems: 1 + + interconnect-names: + const: dma-mem + port: $ref: /schemas/graph.yaml#/$defs/port-base description: Parallel input port, connect to a parallel sensor
diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml index 3ea4a42..c0d7acc 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml
@@ -36,6 +36,12 @@ resets: maxItems: 1 + interconnects: + maxItems: 1 + + interconnect-names: + const: dma-mem + ports: $ref: /schemas/graph.yaml#/properties/ports
diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi index 6f88d87..cc107c6 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
@@ -1062,6 +1062,49 @@ csi: camera@1cb0000 { clock-names = "bus", "mod", "ram"; resets = <&ccu RST_BUS_CSI>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-a83t-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_MIPI_CSI>, + <&ccu CLK_CSI_MISC>; + clock-names = "bus", "mod", "mipi", "misc"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi: endpoint { + remote-endpoint = <&csi_in_mipi_csi2>; + }; + }; + }; }; hdmi: hdmi@1ee0000 {
diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi index 424f4a2..3ca0897 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi
@@ -90,3 +90,7 @@ cpu-crit { }; }; }; + +&wdt { + status = "okay"; +};
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index d116864..53e6b70 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -1,4 +1,10 @@ # SPDX-License-Identifier: GPL-2.0 +# Enables support for device-tree overlays for named devices +DTC_FLAGS_sun50i-a64-pine64-lts := -@ +DTC_FLAGS_sun50i-a64-pine64 := -@ +DTC_FLAGS_sun50i-a64-pine64-plus := -@ +DTC_FLAGS_sun50i-a64-sopine-baseboard := -@ + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-amarula-relic.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index bf05486..1598e86 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -182,12 +182,38 @@ syscon: syscon@3000000 { #size-cells = <1>; ranges; - sram_c: sram@28000 { + /* SRAM C */ + sram@28000 { compatible = "mmio-sram"; reg = <0x00028000 0x30000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00028000 0x30000>; + + /* + * 0x0 ~ 0x20000 is partial alias of VE SRAM below. + * 0x20000 ~ 0x2ffff is (partial?) alias of DE SRAM. + * However the whole region is toggled together. + */ + sram_c: sram-section@0 { + compatible = "allwinner,sun50i-h616-sram-c", + "allwinner,sun50i-a64-sram-c"; + reg = <0x00000 0x30000>; + }; + }; + + /* VE SRAM */ + sram@1a00000 { + compatible = "mmio-sram"; + reg = <0x01a00000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x01a00000 0x200000>; + + ve_sram: sram-section@0 { + compatible = "allwinner,sun50i-h616-ve-sram"; + reg = <0x000000 0x200000>; + }; }; }; @@ -237,6 +263,16 @@ timer0: timer@3009000 { clocks = <&osc24M>; }; + hstimer@3005000 { + compatible = "allwinner,sun50i-h616-hstimer", + "allwinner,sun20i-d1-hstimer"; + reg = <0x03005000 0x1000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_HSTIMER>; + resets = <&ccu RST_BUS_HSTIMER>; + }; + watchdog: watchdog@30090a0 { compatible = "allwinner,sun50i-h616-wdt", "allwinner,sun6i-a31-wdt";
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index 5afa8d9..ca6a168 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -101,7 +101,8 @@ timer { interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; + <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_PPI 12 IRQ_TYPE_LEVEL_HIGH>; }; soc { @@ -128,7 +129,8 @@ gpu: gpu@1800000 { pio: pinctrl@2000000 { compatible = "allwinner,sun55i-a523-pinctrl"; reg = <0x2000000 0x800>; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, @@ -340,6 +342,19 @@ ledc: led-controller@2008000 { status = "disabled"; }; + gpadc: adc@2009000 { + compatible = "allwinner,sun55i-a523-gpadc"; + reg = <0x2009000 0x400>; + clocks = <&ccu CLK_BUS_GPADC0>, <&ccu CLK_GPADC0>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_GPADC0>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + wdt: watchdog@2050000 { compatible = "allwinner,sun55i-a523-wdt"; reg = <0x2050000 0x20>;
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 82cc85a..a810ad3 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -295,6 +295,15 @@ timer: timer@2050000 { clocks = <&dcxo>; }; + hstimer@3008000 { + compatible = "allwinner,sun20i-d1-hstimer"; + reg = <0x03008000 0x1000>; + interrupts = <SOC_PERIPHERAL_IRQ(55) IRQ_TYPE_LEVEL_HIGH>, + <SOC_PERIPHERAL_IRQ(56) IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_HSTIMER>; + resets = <&ccu RST_BUS_HSTIMER>; + }; + wdt: watchdog@20500a0 { compatible = "allwinner,sun20i-d1-wdt-reset", "allwinner,sun20i-d1-wdt";