)]}'
{
  "commit": "85096a73f4dc223b5848e41ce40afc5ee913079e",
  "tree": "0b3254b53c073973efdf299583cecec5e72685a1",
  "parents": [
    "ec669ef2e2cf277f3e73d842bb3bda1c3ea2ea73"
  ],
  "author": {
    "name": "Nicholas Kazlauskas",
    "email": "nicholas.kazlauskas@amd.com",
    "time": "Thu Sep 08 11:11:47 2022 -0400"
  },
  "committer": {
    "name": "Alex Deucher",
    "email": "alexander.deucher@amd.com",
    "time": "Tue Sep 27 17:56:51 2022 -0400"
  },
  "message": "drm/amd/display: Add explicit FIFO disable for DP blank\n\n[Why]\nWe rely on DMCUB to do this when disabling the link but it should\nactually come before we disable the DP VID stream.\n\nIf we don\u0027t then the FIFO can end up with underflow that persists\nthe next time it\u0027s enabled.\n\n[How]\nAdd a DCN314 specific blank sequence that will disable the DIG FIFO\nfirst.\n\nReviewed-by: Syed Hassan \u003cSyed.Hassan@amd.com\u003e\nAcked-by: Jasdeep Dhillon \u003cjdhillon@amd.com\u003e\nSigned-off-by: Nicholas Kazlauskas \u003cnicholas.kazlauskas@amd.com\u003e\nTested-by: Daniel Wheeler \u003cdaniel.wheeler@amd.com\u003e\nSigned-off-by: Alex Deucher \u003calexander.deucher@amd.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "52b71b2fef6778b14b461c99aeee56953f164a83",
      "old_mode": 33188,
      "old_path": "drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dio_stream_encoder.c",
      "new_id": "8c0ab013764e3cf06b85f9ff5e938fd769a2a743",
      "new_mode": 33188,
      "new_path": "drivers/gpu/drm/amd/display/dc/dcn314/dcn314_dio_stream_encoder.c"
    }
  ]
}
