blob: e4e505f52ba0b2b477f008397808ab20c3ac14f4 [file] [log] [blame]
config ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
select GENERIC_IRQ_CHIP
select NO_IOPORT_MAP
select PINCTRL
select PINCTRL_SIRF
help
Support for CSR SiRFprimaII/Marco/Polo platforms
if ARCH_SIRF
menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
config ARCH_ATLAS6
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
default y
select SIRF_IRQ
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
config ARCH_PRIMA2
bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
default y
select SIRF_IRQ
select ZONE_DMA
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
config ARCH_MARCO
bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform"
default y
select ARM_GIC
select HAVE_ARM_SCU if SMP
select SMP_ON_UP if SMP
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
endmenu
config SIRF_IRQ
bool
endif