)]}' { "log": [ { "commit": "6c2de8d9531c7e9aad7ac6701e848bedb3f1d3a4", "tree": "f7b255ede1661132e0f1048267bbb97b9fbe1bf3", "parents": [ "e9456310e1af93fece5bc52a04f7c5b28b653a0b" ], "author": { "name": "Marc Zyngier", "email": "maz@kernel.org", "time": "Mon May 18 14:45:56 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: Handle virtio endianness reset when running nested\n\nWhen running an EL2 guest, we need to make sure we don\u0027t sample\nSCTLR_EL1 to work out the virtio endianness, as this is likely\nto be a bit random.\n\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "e9456310e1af93fece5bc52a04f7c5b28b653a0b", "tree": "6935ba3a57c43ab599271631d35fa350a7fb973c", "parents": [ "ab9ae1411622579d16f6a8455fcc79879f00bf26" ], "author": { "name": "Marc Zyngier", "email": "maz@kernel.org", "time": "Mon May 18 14:45:55 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: Generate HYP timer interrupt specifiers\n\nFEAT_VHE introduced a non-secure EL2 virtual timer, along with its\ninterrupt line. Consequently the arch timer DT binding introduced a fifth\ninterrupt to communicate this interrupt number.\n\nRefactor the interrupts property generation code to deal with a variable\nnumber of interrupts, and forward five interrupts instead of four in case\nnested virt is enabled.\n\nSigned-off-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ab9ae1411622579d16f6a8455fcc79879f00bf26", "tree": "b712a076c5f6284ab596d0188fcea07b5425ca4b", "parents": [ "1b44d7a4b99b190939cbbe6af12599adb0f972a3" ], "author": { "name": "Marc Zyngier", "email": "maz@kernel.org", "time": "Mon May 18 14:45:54 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: Add FEAT_E2H0 support\n\nThe --nested option allows a guest to boot at EL2 without FEAT_E2H0\n(i.e. mandating VHE support). While this is great for \"modern\" operating\nsystems and hypervisors, a few legacy guests are stuck in a distant past.\n\nTo support those, add the --e2h0 command line option, that exposes\nFEAT_E2H0 to the guest, at the expense of a number of other features, such\nas FEAT_NV2. This is conditioned on the host itself supporting FEAT_E2H0.\n\nSigned-off-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "1b44d7a4b99b190939cbbe6af12599adb0f972a3", "tree": "efd473e4a113b86421c50f71d394f262bda47aba", "parents": [ "fe4c35a8dccefe176d6a597a292181ee731e83b8" ], "author": { "name": "Marc Zyngier", "email": "maz@kernel.org", "time": "Mon May 18 14:45:53 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: Add counter offset control\n\nKVM allows the offsetting of the global counter in order to help with\nmigration of a VM. This offset applies cumulatively with the offsets\nprovided by the architecture.\n\nAlthough kvmtool doesn\u0027t provide a way to migrate a VM, controlling\nthis offset is useful to test the timer subsystem.\n\nAdd the command line option --counter-offset to allow setting this value\nwhen creating a VM.\n\nSigned-off-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "fe4c35a8dccefe176d6a597a292181ee731e83b8", "tree": "07f2de4e3fb93857b0ffa237b90c8b6db7a2a1b3", "parents": [ "7e43347c0114799a306c40dbe6046cb268ddbe75" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Mon May 18 14:45:52 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: nested: Add support for setting maintenance IRQ\n\nUses the new VGIC KVM device attribute to set the maintenance IRQ.\nThis is fixed to use PPI 9, as a platform decision made by kvmtool,\nmatching the SBSA recommendation.\nUse the opportunity to pass the kvm pointer to gic__generate_fdt_nodes(),\nas this simplifies the call and allows us access to the nested_virt\nconfig variable on the way.\n\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "7e43347c0114799a306c40dbe6046cb268ddbe75", "tree": "92b9c9c39f634f9a735303a2eb85169fdf06e0b2", "parents": [ "5a1233d80dec30be69f4677c1130b7772119dd9c" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Mon May 18 14:45:51 2026 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue May 19 13:55:25 2026 +0100" }, "message": "arm64: Initial nested virt support\n\nThe ARMv8.3 architecture update includes support for nested\nvirtualization. Allow the user to specify \"--nested\" to start a guest in\n(virtual) EL2 instead of EL1.\nThis will also change the PSCI conduit from HVC to SMC in the device\ntree.\n\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nReviewed-by: Sascha Bischoff \u003csascha.bischoff@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "5a1233d80dec30be69f4677c1130b7772119dd9c", "tree": "1bf1d72ef1b9f6129bf8cbd0e0ba9c19ef922b05", "parents": [ "455cbb9bb191c9fb49206b8da6c651328f3cdb82" ], "author": { "name": "jk.hong", "email": "ryan.jk.hong@gmail.com", "time": "Tue Apr 14 21:06:36 2026 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:18:23 2026 +0100" }, "message": "plic: Fix lock/unlock mismatch in plic__irq_trig()\n\nplic__irq_trig() may call mutex_unlock(\u0026s-\u003eirq_lock) without having acquired the lock first.\nIn some condition, the function jumps to the done label and s-\u003eirq_lock is unlocked without lock first.\n\nSigned-off-by: jk.hong \u003cryan.jk.hong@gmail.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "455cbb9bb191c9fb49206b8da6c651328f3cdb82", "tree": "1dde5f23fcfde98289145a0faefc92b8dbd46970", "parents": [ "ce79de9211ea1e2a24840c1b9c78ec751e41c9b0" ], "author": { "name": "Zongmin Zhou", "email": "zhouzongmin@kylinos.cn", "time": "Tue Mar 31 17:46:14 2026 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:17:29 2026 +0100" }, "message": "riscv: Add BFloat16 extensions support\n\nExpose the BFloat16 extensions (Zfbfmin, Zvfbfmin, Zvfbfwma) to KVM guests\nwhen available in hardware.\nAdd command-line options to disable each extension individually.\n\nSigned-off-by: Zongmin Zhou \u003czhouzongmin@kylinos.cn\u003e\nReviewed-by: Andrew Jones \u003candrew.jones@oss.qualcomm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ce79de9211ea1e2a24840c1b9c78ec751e41c9b0", "tree": "53c4a25f5ec82361c302cf9d31434e7e76a47712", "parents": [ "d2b1def2caa12155935f58def4951e77419d6de9" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:34 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: smccc: Start sending PSCI to userspace\n\nkvmtool now has a PSCI implementation that complies with v1.0 of the\nspecification. Use the SMCCC filter to start sending these calls out to\nuserspace for further handling. While at it, shut the door on the\nlegacy, KVM-specific v0.1 functions.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d2b1def2caa12155935f58def4951e77419d6de9", "tree": "ffe3c49a9a2f79e12b6e7a87954179adb8219359", "parents": [ "c1418fca53ad0e8b397199e22e6069d72fe5089c" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:33 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: psci: Implement SYSTEM_{OFF,RESET}\n\nAdd support for the PSCI SYSTEM_{OFF,RESET} calls. Match the behavior of\nthe SYSTEM_EVENT based implementation and just terminate the VM.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "c1418fca53ad0e8b397199e22e6069d72fe5089c", "tree": "52ac5f2f491ef808a079930d6b301edd5b667925", "parents": [ "2eb3c13c1a54059dec82f08b326dcab0b7b39dbf" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:32 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: psci: Implement MIGRATE_INFO_TYPE\n\nLet the guest know that our PSCI implementation is entirely oblivious to\nthe existence of a Trusted OS, and thus shouldn\u0027t care about it.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "2eb3c13c1a54059dec82f08b326dcab0b7b39dbf", "tree": "b47295bd604ab2f63e7dbfc10cf554af398b12e1", "parents": [ "6e06236cf8faaf8328cbd89c1dd74c867893f45b" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:31 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: psci: Implement AFFINITY_INFO\n\nImplement support for PSCI AFFINITY_INFO by iteratively searching all of\nthe vCPUs in a VM for those that match the specified affinity. Pause the\nVM to avoid racing against other PSCI calls in the system that might\nchange the power state of the vCPUs.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "6e06236cf8faaf8328cbd89c1dd74c867893f45b", "tree": "416b79bfd2d0453f1db443281c017fbf3e0bcf43", "parents": [ "c5a68d261f4b2c61a8ce9ec0f90e34253ea257c0" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:30 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: psci: Implement CPU_ON\n\nAdd support for the PSCI CPU_ON call, wherein a caller can power on a\ntargeted CPU and reset it with the provided context (i.e. entrypoint and\ncontext id). Rely on the KVM_ARM_VCPU_INIT ioctl, which has the effect\nof an architectural warm reset, to do the heavy lifting.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "c5a68d261f4b2c61a8ce9ec0f90e34253ea257c0", "tree": "04d78f4593f54e26f4b16bac146a50bc56dbdee6", "parents": [ "210640bb395c831ccc567512429bef8e77b37f60" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:29 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: psci: Implement CPU_SUSPEND\n\nImplement support for PSCI CPU_SUSPEND, leveraging in-kernel suspend\nemulation (i.e. a WFI state). Eagerly resume the vCPU for any wakeup\nevent.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "210640bb395c831ccc567512429bef8e77b37f60", "tree": "39e49cad7ad07feb2a45d8cb6e6027c5147ae139", "parents": [ "9ba52cf92905ace77efa9ace5be8c10f42e99d7a" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:28 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Add skeleton implementation for PSCI\n\nAdd an extremely barebones implementation for handling PSCI, where the\nonly supported call is PSCI_VERSION.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "9ba52cf92905ace77efa9ace5be8c10f42e99d7a", "tree": "8a6da520eed5ef6243f9875ac39dce2cddebdda2", "parents": [ "42b3f4dd25c2ebca2583267a20be002b36f6cfcf" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:27 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Add support for finding vCPU for given MPIDR\n\nSome PSCI calls take an MPIDR affinity as an argument. Add a helper to\nget the vCPU that matches an MPIDR so we can find the intended\nrecipient.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "42b3f4dd25c2ebca2583267a20be002b36f6cfcf", "tree": "9cacf1d20658c31c5dd67e8766ab837eeec54fc3", "parents": [ "8ee63ab3141a2077f98ce56031cf6335f8b010f0" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:26 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Expose ARM64_CORE_REG() for general use\n\nExpose the macro such that it may be used to get SMCCC arguments in a\nfuture change.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "8ee63ab3141a2077f98ce56031cf6335f8b010f0", "tree": "b86a5436a41287c0bfcc9b8dc8f5215f7b5bf9be", "parents": [ "e7b0bde8aadc65eefae46ec6ebccfc342e93de39" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:25 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Use KVM_SET_MP_STATE ioctl to power off non-boot vCPUs\n\nUsing the POWER_OFF flag in kvm_vcpu_init gets in the way of resetting a\nvCPU in response to a PSCI CPU_ON call, for obvious reasons. Drop the\nflag in favor of using the KVM_SET_MP_STATE call for non-boot vCPUs.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "e7b0bde8aadc65eefae46ec6ebccfc342e93de39", "tree": "f5b5743b46e6a3a8ea5eb22be29308d93181b8f3", "parents": [ "00873ec97632d89bb3e1b67c0d0ea6f530481924" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:24 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Stash kvm_vcpu_init for later use\n\nA subsequent change will add support for resetting a vCPU, which\nrequires reissuing the KVM_ARM_VCPU_INIT ioctl. Save the kvm_vcpu_init\nworked out for later use.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "00873ec97632d89bb3e1b67c0d0ea6f530481924", "tree": "0f52a54f8d97b38b47216dd4936d1a636696c6d1", "parents": [ "0701c4bfe31f33103a1f217cab48018f6faad554" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Mon Mar 30 15:23:23 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "Import arm-smccc.h from Linux v6.19\n\nCopy in the SMCCC definitions from the kernel, which will be used to\nimplement SMCCC handling in userspace. Strip off unnecessary kernel specific\nbits (thus we can\u0027t add it to the update_headers script).\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "0701c4bfe31f33103a1f217cab48018f6faad554", "tree": "74305fe9234475857b76c92c81de8fc35ff37691", "parents": [ "4123e5fa3a764b9743253e12f8961de3b6cb2129" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Mon Mar 30 15:23:22 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "arm64: Sync headers from Linux v6.19 for psci.h\n\nUpdate headers to sync the newly added psci.h for arm64\n\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4123e5fa3a764b9743253e12f8961de3b6cb2129", "tree": "a583b59047918e9b1e800496c68de8db3b415bc7", "parents": [ "d26adf1f21c45ce957b177a3d73376c2c5854176" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Mon Mar 30 15:23:21 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "update_headers: arm64: Track uapi/linux/psci.h for PSCI definitions\n\nIn preparation for adding PSCI support in userspace, fetch the headers\nfrom the kernel.\n\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d26adf1f21c45ce957b177a3d73376c2c5854176", "tree": "755fa1e980730ce538a32036a841eb96be2be8b4", "parents": [ "448c4dae933af25a80a7031fa1d4c04a224ec803" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Mon Mar 30 15:23:20 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "util/update_headers: Warn about missing header files\n\nWarn about missing header files, rather than silently ignoring.\n\nCc: Will Deacon \u003cwill@kernel.org\u003e\nLink: https://lore.kernel.org/all/aYoCiXg8pSC_bwIv@willie-the-truck/\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "448c4dae933af25a80a7031fa1d4c04a224ec803", "tree": "048debc852dd63ca4cda3fce94254e3a9d7760c3", "parents": [ "42f00a6655069b385116cc8aa5fc8aab2915ec84" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Mon Mar 30 15:23:19 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "util/update_headers: Clean up header copying\n\nWe copy two kinds of headers. Generic Linux UAPI headers and the ASM UAPI headers\nfor arch specific targets. Introduce helper functions for each and centralise\nthe copy process\n\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "42f00a6655069b385116cc8aa5fc8aab2915ec84", "tree": "e655f6457d13731efc82bea6cdfe0612371518b2", "parents": [ "716a7c8eddccb51ca50cb8e87b43b13141167c04" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Mon Mar 30 15:23:18 2026 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:16:53 2026 +0100" }, "message": "headers: Update linux/const.h from linux sources\n\nBuilding kvmtool from scratch gives me the following errors with buildroot:\n\nIn file included from include/kvm/pci.h:7,\n from include/kvm/vfio.h:6,\n from include/kvm/kvm-config.h:5,\n from include/kvm/kvm.h:6,\n from builtin-version.c:4:\ninclude/linux/virtio_pci.h:323:20: warning: implicit declaration of function ‘__KERNEL_DIV_ROUND_UP’ [-Wimplicit-function-declaration]\n 323 | #define MAX_CAP_ID __KERNEL_DIV_ROUND_UP(VIRTIO_DEV_PARTS_CAP + 1, 64)\n | ^~~~~~~~~~~~~~~~~~~~~\ninclude/linux/virtio_pci.h:326:24: note: in expansion of macro ‘MAX_CAP_ID’\n 326 | __le64 supported_caps[MAX_CAP_ID];\n | ^~~~~~~~~~\ninclude/linux/virtio_pci.h:326:9: error: variably modified ‘supported_caps’ at file scope\n 326 | __le64 supported_caps[MAX_CAP_ID];\n\nWe inherit linux/virtio_pci.h from the kernel sources and won\u0027t be good to fix\nit by including linux/kernel.h. Instead, pick up up uapi/linux/const.h from the\nkernel tree. This also removes the ifdefery linux/kernel.h\n\nTo prevent a build warning for redefinition, update the headers from v6.19,\nremove the hack from linux.kernel.h in one shot. This was also discussed in\nthe Link, in another context.\n\nCc: Anup Patel \u003capatel@ventanamicro.com\u003e\nCc: Will Deacon \u003cwill@kernel.org\u003e\nLink: https://lore.kernel.org/all/20250211114018.GB8965@willie-the-truck/\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "716a7c8eddccb51ca50cb8e87b43b13141167c04", "tree": "4185add9da0536bc8e366f2fbb9a7d1bcdbbe523", "parents": [ "eb915c763e4b95dd4a9d32763fd449459742e053" ], "author": { "name": "Zongmin Zhou", "email": "zhouzongmin@kylinos.cn", "time": "Tue Mar 24 10:02:27 2026 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon May 18 12:14:00 2026 +0100" }, "message": "riscv: Add Zicbop extension support\n\nWhen the Zicbop extension is available expose it to the guest.\nAlso provide the guest the size of the cache block through DT.\n\nSigned-off-by: Zongmin Zhou \u003czhouzongmin@kylinos.cn\u003e\nReviewed-by: Guo Ren \u003cguoren@kernel.org\u003e\nReviewed-by: Andrew Jones \u003candrew.jones@oss.qualcomm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "eb915c763e4b95dd4a9d32763fd449459742e053", "tree": "9b34d1bd540345cafa674f16d5489f11276d612b", "parents": [ "ef7a3e85790bdfd0e90fdf8c94f91ce19da474de" ], "author": { "name": "Zongmin Zhou", "email": "zhouzongmin@kylinos.cn", "time": "Thu Mar 19 16:24:32 2026 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Mar 19 15:27:37 2026 +0000" }, "message": "vfio: Fix memory leak in vfio_group_create()\n\nWhen snprintf() fails in vfio_group_create(), the function returns\nNULL without freeing the allocated \u0027group\u0027 structure, causing a memory\nleak.\nFix this by jumping to the existing err_free_group label.\n\nSigned-off-by: Zongmin Zhou \u003czhouzongmin@kylinos.cn\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ef7a3e85790bdfd0e90fdf8c94f91ce19da474de", "tree": "1428dafdd6411b7fe82eab21a8f2207236b00b9c", "parents": [ "56f7f680de28ec8bb974d69927004c9cd1f5b743" ], "author": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Feb 09 15:20:42 2026 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Feb 09 15:53:46 2026 +0000" }, "message": "Sync kernel UAPI headers with v6.19\n\nGenerated using util/update_headers.sh.\n\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "56f7f680de28ec8bb974d69927004c9cd1f5b743", "tree": "2e6fb78021e86b20d559d7c8c707760f5e979bd8", "parents": [ "7ad32e5514aca2b6d19398fd3ae5a7c5e0e1ce24" ], "author": { "name": "Suzuki K Poulose", "email": "suzuki.poulose@arm.com", "time": "Thu Jan 08 17:57:39 2026 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Feb 09 15:29:41 2026 +0000" }, "message": "Allow pausing the VM from vcpu thread\n\nPausing the VM from a vCPU thread doesn\u0027t work today, as it waits indefinitely\nfor a signal that never comes. By using the \"current_kvm_cpu\", enlighten the\nkvm__pause() to skip the current CPU and do it inline. This also brings in a\nrestriction that a following kvm__continue() must be called from the same vCPU\nthread.\n\nCc: Will Deacon \u003cwill@kernel.org\u003e\nCc: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/all/20230918104028.GA17744@willie-the-truck/\nReviewed-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nSigned-off-by: Suzuki K Poulose \u003csuzuki.poulose@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "7ad32e5514aca2b6d19398fd3ae5a7c5e0e1ce24", "tree": "d31e4ede4ee870be168780b788e4ddf6ddecada3", "parents": [ "c4e9b3a8de7f0d5cf7e092a29d1f3c5030046bc8" ], "author": { "name": "Steven Price", "email": "steven.price@arm.com", "time": "Wed Sep 17 14:44:14 2025 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Sep 18 11:42:48 2025 +0100" }, "message": "net/uip: Avoid deadlock in uip_tcp_socket_free()\n\nThe function uip_tcp_socket_free() is called with the sk lock held, but\nthen goes on to call uip_tcp_socket_close() which attempts to aquire the\nlock a second time, triggering a deadlock if there are outstanding TCP\nconnections.\n\nRename the existing uip_tcp_socket_close() to a _locked variety and\nremoving the locking from it. Add a new uip_tcp_socket_close() which\ntakes the lock and calls the _locked variety.\n\nFixes: d87b503f4d6e (\"net/uip: Add exit function\")\nSigned-off-by: Steven Price \u003csteven.price@arm.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "c4e9b3a8de7f0d5cf7e092a29d1f3c5030046bc8", "tree": "0330d77d3ef3e971e60a3ead9cd1b0230aff8a62", "parents": [ "ba6830eec0f5ab734b093657b16b555e0437b927" ], "author": { "name": "Paolo Abeni", "email": "pabeni@redhat.com", "time": "Thu Aug 14 17:37:02 2025 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Aug 19 11:57:50 2025 +0100" }, "message": "virtio/pci: explicit zero unknown devices features\n\nThe linux kernel implementation for the virtio_net driver recently\ngained support for virtio features above the 64th bit.\n\nIt relies on the hypervisor to clear the features data for unknown /\nunsupported features range.\n\nThe current pci-modern implementation, in such scenario, leaves the\ndata memory untouched, which causes the guest kernel assuming \"random\"\nfeatures are supported (and possibly leaks host memory contents).\n\nExplicitly clear the features data for unsupported range.\n\nReported-by: Cristian Marussi \u003ccristian.marussi@arm.com\u003e\nSigned-off-by: Paolo Abeni \u003cpabeni@redhat.com\u003e\nTested-by: Cristian Marussi \u003ccristian.marussi@arm.com\u003e\nLink: https://lore.kernel.org/r/ed62443b8fd3fef87bd313a54f821cf363f647a5.1755185758.git.pabeni@redhat.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ba6830eec0f5ab734b093657b16b555e0437b927", "tree": "29d56009773e9ca50028d3be68b13f80f723635e", "parents": [ "1117dbc8ceb21abc6e8cd9861450695995852290" ], "author": { "name": "Thomas Perale", "email": "thomas.perale@mind.be", "time": "Sun Jun 29 22:22:21 2025 +0200" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Jul 21 13:00:29 2025 +0100" }, "message": "vfio: include libgen.h (for musl compatibility)\n\nStarting GCC14 \u0027implicit-function-declaration\u0027 are treated as errors by\ndefault. When building kvmtool with musl libc, the following error\noccurs due to missing declaration of \u0027basename\u0027:\n\nvfio/core.c:537:22: error: implicit declaration of function ‘basename’ [-Wimplicit-function-declaration]\n 537 | group_name \u003d basename(group_path);\n | ^~~~~~~~\nvfio/core.c:537:22: warning: nested extern declaration of ‘basename’ [-Wnested-externs]\nvfio/core.c:537:20: error: assignment to ‘char *’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion]\n 537 | group_name \u003d basename(group_path);\n | ^\n\nThis patch fixes the issue by including the appropriate header, ensuring\ncompatibility with musl and GCC14.\n\nSigned-off-by: Thomas Perale \u003cthomas.perale@mind.be\u003e\nSigned-off-by: Thomas Perale \u003cperale.thomas@gmail.com\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20250629202221.893360-1-thomas.perale@mind.be\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "1117dbc8ceb21abc6e8cd9861450695995852290", "tree": "b7ce9874a1764e64d61c5f53c5ebf2b6381d22de", "parents": [ "a50e8d888be8171b9dd650e4b61bb6811648e255" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:47 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Allow including extensions in the min CPU type using command-line\n\nIt is useful to allow including extensions in the min CPU type on need\nbasis via command-line. To achieve this, parse extension names as comma\nseparated values appended to the \"min\" CPU type using command-line.\n\nFor example, to include Sstc and Ssaia in the min CPU type use\n\"--cpu-type min,sstc,ssaia\" command-line option.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-11-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "a50e8d888be8171b9dd650e4b61bb6811648e255", "tree": "6935ff5e1b1681711ef39bf0cecfc4813cbc187d", "parents": [ "d47ad017c404ddc815ce84cd65aa6f1c1b6e297f" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:46 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Add cpu-type command-line option\n\nCurrently, the KVMTOOL always creates a VM with all available\nISA extensions virtualized by the in-kernel KVM module.\n\nFor better flexibility, add cpu-type command-line option using\nwhich users can select one of the available CPU types for VM.\n\nThere are two CPU types supported at the moment namely \"min\"\nand \"max\". The \"min\" CPU type implies VCPU with rv[64|32]imafdc\nISA whereas the \"max\" CPU type implies VCPU with all available\nISA extensions.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-10-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d47ad017c404ddc815ce84cd65aa6f1c1b6e297f", "tree": "6dd2824ec06b7c99c5d3d80654cd7cdba1afbedf", "parents": [ "b6e9f38b28c9e19cedaecfaf08f2c984cf9d0ddf" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:45 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Include single-letter extensions in isa_info_arr[]\n\nCurrently, the isa_info_arr[] only include multi-letter extensions but\nthe KVM ONE_REG interface covers both single-letter and multi-letter\nextensions so extend isa_info_arr[] to include single-letter extensions.\n\nThis also allows combining two loops in the generate_cpu_nodes()\nfunction into one loop.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-9-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "b6e9f38b28c9e19cedaecfaf08f2c984cf9d0ddf", "tree": "159b4e51bfad0e5654ffd28f49979aebee34c4f4", "parents": [ "1132ace1c069f4e23b556f1481ba18d4f3e0c63b" ], "author": { "name": "Andrew Jones", "email": "ajones@ventanamicro.com", "time": "Sat Apr 26 16:33:44 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Fix no params with nodefault segfault\n\nFix segfault received when using --nodefault without --params.\n\nFixes: 7c9aac003925 (\"riscv: Generate FDT at runtime for Guest/VM\")\nSuggested-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20250123151339.185908-2-ajones@ventanamicro.com\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-8-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "1132ace1c069f4e23b556f1481ba18d4f3e0c63b", "tree": "f792b93c15ec6f1ce78aabdaeaad1e54ec646c7e", "parents": [ "fcc316016e9ffe5223ea37bce9df61dabba1ac01" ], "author": { "name": "Andrew Jones", "email": "ajones@ventanamicro.com", "time": "Sat Apr 26 16:33:43 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Make system suspend time configurable\n\nIf the default of 5 seconds for a system suspend test is too long or\ntoo short, then feel free to change it.\n\nSigned-off-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-7-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "fcc316016e9ffe5223ea37bce9df61dabba1ac01", "tree": "ee190094456a92e8d98f628ee871fef5e9166d5d", "parents": [ "0641ed8c3763c5a796cc9b390efe788abbe7b391" ], "author": { "name": "Andrew Jones", "email": "ajones@ventanamicro.com", "time": "Sat Apr 26 16:33:42 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Add SBI system suspend support\n\nProvide a handler for SBI system suspend requests forwarded to the\nVMM by KVM and enable system suspend by default. This is just for\ntesting purposes, so the handler only sleeps 5 seconds before\nresuming the guest. Resuming a system suspend only requires running\nthe system suspend invoking hart again, everything else is handled by\nKVM.\n\nNote, resuming after a suspend doesn\u0027t work with 9p used for the\nguest\u0027s rootfs. Testing with a disk works though, e.g.\n\n lkvm-static run --nodefaults -m 256 -c 2 -d rootfs.ext2 -k Image \\\n -p \u0027console\u003dttyS0 rootwait root\u003d/dev/vda ro no_console_suspend\u0027\n\nSigned-off-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-6-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "0641ed8c3763c5a796cc9b390efe788abbe7b391", "tree": "f7802e18717c54f002b433378b5c1f2b89fbf614", "parents": [ "8be1c78896b47cc211114699ffd890c23011ebf6" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:41 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Add Ziccrse extension support\n\nWhen the Ziccrse extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-5-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "8be1c78896b47cc211114699ffd890c23011ebf6", "tree": "f1a7708f95bea897b866b14468a3a102d9b9dcd3", "parents": [ "a9880860d781a69ddf1cf20cccde316f9fa4a40e" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:40 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Add Zabha extension support\n\nWhen the Zabha extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "a9880860d781a69ddf1cf20cccde316f9fa4a40e", "tree": "b2d5ab793e73b0f7a5d142f23116364e2e2c92f4", "parents": [ "2ab7f9fa7008e437ef52fd17fc775d4ae1097e5e" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Apr 26 16:33:39 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:41:57 2025 +0100" }, "message": "riscv: Add Svvptc extension support\n\nWhen the Svvptc extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250426110348.338114-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "2ab7f9fa7008e437ef52fd17fc775d4ae1097e5e", "tree": "14018c668cc9e604082c2e031e6c389d97868c03", "parents": [ "ad9b731921e3e23d166fea9aae7d4bfbe4f4e2bc" ], "author": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:39:45 2025 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:39:45 2025 +0100" }, "message": "Sync kernel UAPI headers with v6.14\n\nGenerated using util/update_headers.sh.\n\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ad9b731921e3e23d166fea9aae7d4bfbe4f4e2bc", "tree": "e31a9ffd8452ad2f2b2575c4ebfa690c6c7d2dbd", "parents": [ "d410d9a16f91458ae2b912cc088015396f22dfad" ], "author": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:35:09 2025 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri May 16 14:38:53 2025 +0100" }, "message": "util: Fix update_headers.sh after removal of 32-bit Arm code\n\nCommit 4cd7b87ab292 (\"arm64: Move asm headers\") moved the 64-bit\nArm headers as part of the cleanup following the removal of the 32-bit\nArm code. Unfortunately, the update_headers.sh wasn\u0027t updated with the\nnew paths and so trying to sync the kernel UAPI results in an error\nfrom the script:\n\n | cp: cannot create regular file \u0027arm/aarch64/include/asm/\u0027: No such file or directory\n\nFix-up the script so that it doesn\u0027t look in non-existent directories.\n\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d410d9a16f91458ae2b912cc088015396f22dfad", "tree": "9abdc55c793d18354ef76979d846513ca47a1b4a", "parents": [ "0a10c482b4038b0b03aa7b9f960095705c25a178" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:32 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Get rid of the \u0027arm-common\u0027 include directory\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-10-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "0a10c482b4038b0b03aa7b9f960095705c25a178", "tree": "566656add6b1e88ba09d4d6d0086b077cc15c36a", "parents": [ "4cd7b87ab29242213150146a0811d2e20cc72f29" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:31 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Rename top-level directory\n\nAs a finishing touch, align the top-level arch directory name with the\nkernel\u0027s naming scheme.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-9-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4cd7b87ab29242213150146a0811d2e20cc72f29", "tree": "eb28be3c36f6b67dc227af5a4014129f209e2643", "parents": [ "f8a539a99ef5c42b192cac9b3b47de2ad497422b" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:30 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Move asm headers\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-8-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "f8a539a99ef5c42b192cac9b3b47de2ad497422b", "tree": "d7d6257370f21937cc79787c602f36dd52cc23c1", "parents": [ "71135783886f3969fd508ec3e17cf72b5e707830" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:29 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Move remaining kvm/* headers\n\nMove the remaining kvm/* headers into the top-level ARM include path.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-7-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "71135783886f3969fd508ec3e17cf72b5e707830", "tree": "ae6616f3f4b40704cce37d87b7991b192f62deea", "parents": [ "65878da2350898d1dca6916d7bb022b2ad96881e" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:28 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Combine kvm-config-arch.h\n\nYou get the point...\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-6-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "65878da2350898d1dca6916d7bb022b2ad96881e", "tree": "7881f0f6f4f409f373564cd47c456bd3ea1f18bc", "parents": [ "14e8c4204d1160721aa537117ea7a1969b0b1ee8" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:27 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Merge kvm-cpu.c\n\nAs before, glue together the arm64 and ARM generic bits into one file.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-5-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "14e8c4204d1160721aa537117ea7a1969b0b1ee8", "tree": "ff006cbd8d15022394944302593a352f8cb4f10c", "parents": [ "518857543a4b4947a61a471a512c2d31f92ba67b" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:26 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Combine kvm.c\n\nGlue together the ARM common and previously arm64-specific bits into one\nsource file.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-4-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "518857543a4b4947a61a471a512c2d31f92ba67b", "tree": "e8e8da6cc3ce054adc4150ee09d4fd13fc2b5797", "parents": [ "329fe56944fc5f50f40f8a625d1e6da4a7f09b6f" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:25 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "arm64: Move arm64-only features into main directory\n\nStart the backing out the 32/64-bit split by moving arm64-only features\nup a level into the main arch directory.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-3-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "329fe56944fc5f50f40f8a625d1e6da4a7f09b6f", "tree": "ab9cc6df12f699848e6c4b415dac0ffb809002f2", "parents": [ "e48563f5c4a48fe6a6bc2a98a9a7c84a10f043be" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Fri Apr 04 09:52:24 2025 -0700" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Thu Apr 17 12:57:11 2025 +0100" }, "message": "Drop support for 32-bit arm\n\nLinux dropped support for KVM in 32-bit arm kernels almost 5 years ago\nin the 5.7 kernel release. In addition to that KVM/arm64 never had\n32-bit compat support, so it is a safe assumption that usage of 32-bit\nkvmtool is pretty much dead at this point.\n\nDo not despair -- 32-bit guests are still supported with a 64-bit\nuserspace.\n\nAcked-by: Marc Zyngier \u003cmaz@kernel.org\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20250404165233.3205127-2-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "e48563f5c4a48fe6a6bc2a98a9a7c84a10f043be", "tree": "e910e247deb6a812fa5431b2d074233e6f272db6", "parents": [ "4489348c961b2763e230e645793568ea922ecffe" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:24 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "riscv: Add Ssnpm extension support\n\nWhen the Ssnpm extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-7-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4489348c961b2763e230e645793568ea922ecffe", "tree": "14435ec4eb9e49c79a47a35b2cd28f0ca4d8aa4e", "parents": [ "521b1b676e5cc055ebb3988d692a345a63403661" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:23 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "riscv: Add Smnpm extension support\n\nWhen the Smnpm extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-6-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "521b1b676e5cc055ebb3988d692a345a63403661", "tree": "06c7ec4c4fe830a2a6e9ae72e52c55af04488482", "parents": [ "f8ed0321726344da94abbd37eb3247cb3c5b795f" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:22 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "riscv: Add Svadu extension support\n\nWhen the Svadu extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-5-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "f8ed0321726344da94abbd37eb3247cb3c5b795f", "tree": "ef2f26fe80c6a9be01b7f2d0b599eef234aacfcd", "parents": [ "66567918472fbe2373db56db626b83928f2b64e1" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:21 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "riscv: Add Svade extension support\n\nWhen the Svade extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "66567918472fbe2373db56db626b83928f2b64e1", "tree": "d6b70e16bb86cbcb2533bcde7e1337df933994d1", "parents": [ "4b2cc0660ef3cdf3b8c3693343c2ee078ef63283" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:20 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "Add __KERNEL_DIV_ROUND_UP() macro\n\nThe latest virtio_pci.h header from Linux-6.13 kernel requires\n__KERNEL_DIV_ROUND_UP() macro so define it conditionally in\nlinux/kernel.h.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4b2cc0660ef3cdf3b8c3693343c2ee078ef63283", "tree": "48c531b410228bf210e57dd26bd0e89bc51e46e7", "parents": [ "4c4191b113c126ec01e75e2e380da14d456c26d2" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Jan 27 18:54:19 2025 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:42:11 2025 +0000" }, "message": "Sync-up headers with Linux-6.13 kernel\n\nWe sync-up Linux headers to get latest KVM RISC-V headers having\nnewly added ISA extensions in ONE_REG interface.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20250127132424.339957-2-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4c4191b113c126ec01e75e2e380da14d456c26d2", "tree": "3799f09b072399a385fa119a4a5206fbb756d100", "parents": [ "6e0b71815a63213ff8503a320747e37f5d1c042b" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Mon Jan 20 16:18:00 2025 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:27:37 2025 +0000" }, "message": "Do not a print a warning on failing host\u003c-\u003eguest address translation\n\nguest_flat_to_host() and host_to_guest_flat return NULL, respectively 0,\nwhen the address is not found in the existing memslots. It is expected that\nthe calling code will handle this error.\n\nHowever, both functions also print an error message containing the\noffending address. This can be redundant, if the calling code also prints\nthe address, or even misleading, if the calling code can gracefully handle\nthe failure, like is the case in kvm__dump_mem().\n\nChange the warning to a debug, since knowing the address might still be\nuseful for those call sites where the address isn\u0027t printed, or if the\nerror isn\u0027t handled at all.\n\nBefore, when running the PMU test from kvm-unit-tests using the test\nrunner, which redirects stdout (where kvm__dump_mem() writes) and stderr\n(where pr_warning() writes):\n\n Error: KVM exit reason: 9 (\"KVM_EXIT_FAIL_ENTRY\")\n Warning: unable to translate guest address 0x0 to host\n\n Registers:\n\n\u003csnip\u003e\n\n*lr:\n 0x00000000: \u003cunknown\u003e\n 0x00000008: \u003cunknown\u003e\n 0x00000010: \u003cunknown\u003e\n 0x00000018: \u003cunknown\u003e\n\nThe error is caused by the VCPU migrating to a physical CPU with a\ndifferent PMU. In the example, the warning not only is unnecessary, but is\nquite a distance away from the offending address and can confuse the person\nlooking at the code, like it happened to the patch author.\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20250120161800.30270-3-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "6e0b71815a63213ff8503a320747e37f5d1c042b", "tree": "b915b4bd71e37f4c4c07e434f0ba7c819823f886", "parents": [ "6d754d01fe2cb366f3b636d8a530f46ccf3b10d8" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Mon Jan 20 16:17:59 2025 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Feb 11 11:27:37 2025 +0000" }, "message": "Propagate the error code from any VCPU thread\n\nkvm_cmd_run_work() doesn\u0027t capture the return code for VCPU 0 when calling\npthread_join(). Then kvm_cpu__exit() waits for the threads for VCPUs 1..N\nto terminate, and it sets the return value to 0 if at least one of the VCPU\nthreads returns 0.\n\nThis approach creates several issues:\n\n1. An error code from a previous VCPU is overwritten with 0 (success).\n2. kvmtool will return 0 even if VCPU 0 encountered an error, as long as\n at least one of the other VCPUs exited successfully.\n3. kvm_cpu__exit() will return an uninitialized value if all VCPUs 1..N\n exited with an error, or if there is only one VCPU, VCPU 0.\n\nFix all issues issues by propagating the return code from VCPU 0, and\nsaving the error code for each of the remaining VCPUs. If multiple VCPU\nthreads exit with an error, the exit status is set to the first error.\n\nWith this change, kvmtool will terminate with a non-zero exit code if there\nwas an unhandled error in KVM_RUN, as expected.\n\nWhile on the subject of return values, apply the more common pattern of\nusing PTR_ERR(\u003creturn value\u003e) in kvm_cpu_thread() instead of double\ncasting the return value.\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20250120161800.30270-2-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "6d754d01fe2cb366f3b636d8a530f46ccf3b10d8", "tree": "5af2e79457d268972040e45a890e42f87b149ea6", "parents": [ "9b26a8e2c57f4060e65baaffc82c7d6d48867eef" ], "author": { "name": "Keir Fraser", "email": "keirf@google.com", "time": "Wed Dec 11 09:45:14 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 23:19:00 2024 +0000" }, "message": "Reset all VCPUs before any entering run loops\n\nVCPU threads may currently enter their run loops before all other\nVCPUs have \"reset\" to an appropriate initial state.\n\nActually this normally works okay, but on pKVM-ARM the VM\u0027s Hyp state\n(including boot VCPU\u0027s initial state) gets set up by the first VCPU\nthread to call ioctl(KVM_RUN). This races boot VCPU thread\u0027s\nintialisation of register state, and can result in the boot VCPU\nstarting execution at PC\u003d0.\n\nThe simplest fix is to reset each VCPU when it is first created,\nbefore the VCPU run threads are even created.\n\nSigned-off-by: Keir Fraser \u003ckeirf@google.com\u003e\nLink: https://lore.kernel.org/r/20241211094514.4152415-1-keirf@google.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "9b26a8e2c57f4060e65baaffc82c7d6d48867eef", "tree": "49d3b3650189113cd88060cc8b1475bebc4b1e59", "parents": [ "32345de5d89d106820ce74bf3c34e61eedbf11ca" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Thu Nov 28 15:12:46 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 23:15:02 2024 +0000" }, "message": "arm64: Increase the payload memory region size to 512MB\n\nkvmtool uses the same memory map for 64bit and 32bit guests, where it\ncopies the kernel, the initrd and DTB in the bottom 256MB.\n\nThe restriction on placing everything in the bottom 256MB comes from the\naarch32 boot protocol, where the kernel, DTB and initrd must be placed in a\nregion covered by the low-memory mapping. The size of the lowmem region\nvaries based on the kernel-userspace split, which is a Kconfig option, and\non the vmalloc area size, which can be specified by the user on the kernel\ncommand line. Hence kvmtool\u0027s choice of using the bottom 256MB as a\nreasonable compromise which has worked well so far.\n\nSina has reported in private that they were unable to create a 64bit\nvirtual machine with a 351MB initrd, and that\u0027s due to the 256MB\nrestriction placed on the arm64 payload layout.\n\nThis restriction is not found in the arm64 boot protocol: booting.rst in\nthe Linux v6.12 source tree specifies that the kernel and initrd must be\nplaced in the same 32GB window. There is also a mention of kernels prior\nto v4.2 requiring the DTB to be placed within a 512MB region starting at\nthe kernel image minus the kernel offset.\n\nIncrease the payload region size to 512MB for arm64, which will provide\nmaximum compatibility with Linux guests, while allowing for larger initrds\nor kernel images. This means that the gap between the DTB (or initrd, if\npresent) and the kernel is larger now.\n\nFor 32 bit guests, the payload region size has been kept unchanged, because\nit has proven adequate so far.\n\nReported-by: Abdollahi Sina \u003cs.abdollahi22@imperial.ac.uk\u003e\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20241128151246.10858-5-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "32345de5d89d106820ce74bf3c34e61eedbf11ca", "tree": "bb54a8f7195704c392910bfe03d5ed3eb42f55fe", "parents": [ "ca57fb69840b2016bbb8852690ace583ff487408" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Thu Nov 28 15:12:45 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 23:15:02 2024 +0000" }, "message": "arm64: Use the kernel header image_size when loading into memory\n\nThe field \u0027image_size\u0027 from the kernel header encodes the kernel size when\nloaded in memory. This includes the BSS section which gets zeroed early\nduring boot (for example, in early_map_kernel() in Linux v6.12), section\nwhich is not reflected in the file size.\n\nkvmtool, after loading the kernel image into memory, uses the file size,\nnot the image size, to compute the end of the kernel to check for overlaps.\nAs a result, kvmtool doesn\u0027t detect when the DTB or initrd overlap with the\nin memory kernel image as long as they don\u0027t overlap with the file, and\nthis leads to Linux silently overwriting the DTB or the initrd with zeroes\nduring boot.\n\nThis kind of issue, when it happens, is not trivial to debug. kvmtool\nalready reads the image header to get the kernel offset, so expand on that\nto also read the image size, and use it instead of the file size for memory\nlayout calculations.\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20241128151246.10858-4-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ca57fb69840b2016bbb8852690ace583ff487408", "tree": "bab8a39ac443bb3f082ebdfb20796117156e5737", "parents": [ "167aa1eb072196a90f563210a6cf7570dee1067c" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Thu Nov 28 15:12:44 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 23:15:01 2024 +0000" }, "message": "arm: Check return value for host_to_guest_flat()\n\nkvmtool, on arm and arm64, puts the kernel, DTB and initrd (if present) in\na 256MB memory region that starts at the bottom of RAM.\nkvm__arch_load_kernel_image() copies the kernel at the start of RAM, the\nDTB is placed at the top of the region, and immediately below it the\ninitrd.\n\nWhen the initrd is specified by the user, kvmtool checks that it doesn\u0027t\noverlap with the kernel by computing the start address in the host\u0027s\naddress space:\n\n\tfstat(fd_initrd, \u0026sb);\n\tpos \u003d pos - (sb.st_size + INITRD_ALIGN);\n\tguest_addr \u003d ALIGN(host_to_guest_flat(kvm, pos), INITRD_ALIGN); (a)\n\tpos \u003d guest_flat_to_host(kvm, guest_addr); (b)\n\nIf the initrd is large enough to completely overwrite the kernel and start\nbelow the guest RAM (pos \u003c kvm-\u003eram_start), then kvmtool will omit the\nfollowing errors:\n\n Warning: unable to translate host address 0xfffe849ffffc to guest (1)\n Warning: unable to translate guest address 0x0 to host (2)\n Fatal: initrd overlaps with kernel image. (3)\n\n(1) is because (a) calls host_to_guest_flat(kvm, pos) with a \u0027pos\u0027\noutside any of the memslots.\n\n(2) is because guest_flat_to_host() is called at (b) with guest_addr\u003d0,\nwhich is what host_to_guest_flat() returns if the supplied address is not\nfound in any of the memslots. This warning is eliminated by this patch.\n\nAnd finally, (3) is the most useful message, because it tells the user what\nthe error is.\n\nThe issue is a more general pattern in kvm__arch_load_kernel_image():\nkvmtool doesn\u0027t check if host_to_guest_flat() returns 0, which means that\nthe host address is not within any of the memslots. Add a check for that,\nwhich will at the very least remove the second warning.\n\nThis also fixes the following edge cases:\n\n1. The same warnings being emitted in a similar scenario with the DTB, when\nthe RAM is smaller than FDT_MAX_SIZE + FDT_ALIGN.\n\n2. When copying the kernel, if the RAM size is smaller than the kernel\noffset, the start of the kernel (represented by the variable \u0027pos\u0027) will be\noutside the VA space allocated for the guest RAM. limit - pos will wrap\naround, because gcc 14.1.1 wraps the pointers (void pointer arithmetic is\nundefined in C99). Then read_file()-\u003e..-\u003eread() will return -EFAULT because\nthe destination address is unallocated (as per man 2 read, also reproduced\nduring testing).\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20241128151246.10858-3-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "167aa1eb072196a90f563210a6cf7570dee1067c", "tree": "697ec14fcf5b767c2d38fa42b037bafe7de315d5", "parents": [ "2be69d9d4ae32a1c68ebf5f6b3ca733571da0dd5" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Thu Nov 28 15:12:43 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 23:15:01 2024 +0000" }, "message": "arm: Fix off-by-one errors when computing payload memory layout\n\nIn kvm__arch_load_kernel_image(), \u0027limit\u0027 is computed to be the topmost\nbyte address where the payload can reside.\n\nIn all the read_file() calls, the maximum size of the file being read is\ncomputed as limit - pos, which is incorrect: either limit is inclusive, and\nit should be limit - pos + 1, or the maximum size is correct and limit is\nincorrectly computed as inclusive.\n\nAfter reserving space for the DTB, \u0027limit\u0027 is updated to point at the first\nbyte of the DTB. Which is in contradiction with the way it is initially\ncalculated, because in theory this makes it possible for the initrd (which\nis copied below the DTB) to overwrite the first byte of the DTB. That\u0027s\nonly avoided by accident, and not by design, because, as explained above,\nthe size of the initrd is smaller by 1 byte (read_file() has the size\nparameter limit - pos, instead of limit - pos + 1).\n\nLet\u0027s get rid of this confusion and compute \u0027limit\u0027 as exclusive from the\nstart.\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20241128151246.10858-2-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "2be69d9d4ae32a1c68ebf5f6b3ca733571da0dd5", "tree": "9cb566d5a293d9c06923e1348b1b1f93b1a12c80", "parents": [ "574bd7b432ec0dd71b719f05094e12108194da12" ], "author": { "name": "Alexandru Elisei", "email": "alexandru.elisei@arm.com", "time": "Thu Nov 28 13:50:41 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Dec 11 22:41:26 2024 +0000" }, "message": "builtin-run: Allow octal and hex numbers for -m/--mem\n\nThere is no reason why -m/--mem should not allow the user to express the\ndesired memory size in octal or hexadecimal, especially when it\u0027s as easy\nas changing the strtoull() \u0027base\u0027 parameter to 0, as per man 3 strtoull.\n\nBefore:\n\n $ ./lkvm run -m 0x200 -k Image\n\nwould fail with the error message:\n\n Fatal: Invalid RAM size: 0x200\n\nAnd now that works as expected.\n\nBefore:\n\n $ ./lkvm run -m 01000 -k Image\n\nwould create a VM with 1000MB of memory, when it\u0027s known that numbers\nthat start with a 0 are in base 8. With this patch, that\u0027s interpreted\ncorrectly as 512 in base 8.\n\nNote that this is a change in behaviour, but writing decimal numbers with\nleading zeros is very uncommon, and it is this author\u0027s humble opinion that\nthere are no kvmtool users that do this.\n\nSigned-off-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20241128135041.8737-1-alexandru.elisei@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "574bd7b432ec0dd71b719f05094e12108194da12", "tree": "01a815a198dd30e1204becc700641cfa69db9ec6", "parents": [ "3040b298156e4e2a82b27ac8db5bd63a72b3785b" ], "author": { "name": "Björn Töpel", "email": "bjorn@rivosinc.com", "time": "Mon Nov 04 20:21:19 2024 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Nov 11 16:44:08 2024 +0000" }, "message": "riscv: Pass correct size to snprintf()\n\nThe snprintf() function does not get the correct size argument passed,\nwhen the FDT ISA string is built. Instead of adjusting the size for\neach extension, the full size is passed for every iteration. Doing so\nwill make __snprinf_chk() bail out on glibc.\n\nAdjust size for each iteration.\n\nFixes: 8aff29e1dafe (\"riscv: Append ISA extensions to the device tree\")\nSigned-off-by: Björn Töpel \u003cbjorn@rivosinc.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241104192120.75841-1-bjorn@kernel.org\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "3040b298156e4e2a82b27ac8db5bd63a72b3785b", "tree": "9a129dacdc38c53199a5000cce8d02d1b5200c33", "parents": [ "1f0e5ba9e4583974ceca752cd3ca28a94a7b647f" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:24 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zimop extension support\n\nWhen the Zimop extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-9-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "1f0e5ba9e4583974ceca752cd3ca28a94a7b647f", "tree": "dbe4bf06ab9b779da06091d4b5992c97d967ba7e", "parents": [ "9f50870b2701cbd03ecf2fbee89747f5e3ba4bdc" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:23 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zcmop extension support\n\nWhen the Zcmop extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-8-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "9f50870b2701cbd03ecf2fbee89747f5e3ba4bdc", "tree": "d71899c6886d7dca41f606b6cdfe2b9d512564b2", "parents": [ "80d2e0cd1496aa3098415a56e3a3a28cede343ab" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:22 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zcf extension support\n\nWhen the Zcf extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-7-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "80d2e0cd1496aa3098415a56e3a3a28cede343ab", "tree": "5db47cc0f1ae4f442281015e01828a68fa31f97b", "parents": [ "78bafd5691be6726822384c34e0213ccd02def06" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:21 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zcd extension support\n\nWhen the Zcd extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-6-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "78bafd5691be6726822384c34e0213ccd02def06", "tree": "23239a415fb3046432d31d5dec9bb42254134886", "parents": [ "4b8b352b0c258131acb6933b9d00dfa1f9c5aa71" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:20 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zcb extension support\n\nWhen the Zcb extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-5-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4b8b352b0c258131acb6933b9d00dfa1f9c5aa71", "tree": "dfbb8e65d1be7c9dcb18e84354adf4786316c000", "parents": [ "c7a4bd93833f30fe660a20160e028790d21f7453" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:19 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zca extension support\n\nWhen the Zca extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "c7a4bd93833f30fe660a20160e028790d21f7453", "tree": "4c323680f0e8e03b01347d491680af4dcf91b6fd", "parents": [ "b862ed4bbe34ad046ac4de15f62be2c2277f2e0f" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:18 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "riscv: Add Zawrs extension support\n\nWhen the Zawrs extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "b862ed4bbe34ad046ac4de15f62be2c2277f2e0f", "tree": "17b373572db734658127aad8211e0e023c03b49d", "parents": [ "b48735e5d562eaffb96cf98a91da212176f1534c" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Sat Oct 05 13:30:17 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Wed Oct 23 16:56:03 2024 +0100" }, "message": "Sync-up headers with Linux-6.11 kernel\n\nWe sync-up Linux headers to get latest KVM RISC-V headers having\nnewly added ISA extensions in ONE_REG interface.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20241005080024.11927-2-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "b48735e5d562eaffb96cf98a91da212176f1534c", "tree": "8f3540bd109fa264d1e2c856a5596392dd86d9b4", "parents": [ "100fade1ac13f242d6fce9a3a7eab3f1f92f144b" ], "author": { "name": "leixiang", "email": "leixiang@kylinos.cn", "time": "Wed Jul 10 17:45:51 2024 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Aug 30 11:11:12 2024 +0100" }, "message": "disk/core: Fix memory leakage in open all disks\n\nFix memory leakage in disk/core disk_image__open_all when malloc disk\nfailed, should free the disks that already malloced.\n\nSigned-off-by: Lei Xiang \u003cleixiang@kylinos.cn\u003e\nSuggested-by: Xie Ming \u003cxieming@kylinos.cn\u003e\nSuggested-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nSuggested-by: Will Deacon \u003cwill@kernel.org\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "100fade1ac13f242d6fce9a3a7eab3f1f92f144b", "tree": "bebfd08208072424d801c1cbb873b82459d79008", "parents": [ "027784f4c67ecf3c9480cf92ee19d44c6a7a63c3" ], "author": { "name": "Andrew Jones", "email": "ajones@ventanamicro.com", "time": "Wed Aug 21 19:56:10 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Aug 30 11:04:06 2024 +0100" }, "message": "riscv: Correct number of hart bits\n\nThe number of hart bits should be obtained from the highest hart ID,\nnot the number of harts. For example, if a guest has 2 harts, then\nthe number of bits should be fls(1) \u003d\u003d 1.\n\nSigned-off-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240821142610.3297483-5-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "027784f4c67ecf3c9480cf92ee19d44c6a7a63c3", "tree": "eb909cb9ab55a2780dcebde004d6f88886cc99ce", "parents": [ "fa958fb68cfbab62b798ec7fe78b150a2dfafaf8" ], "author": { "name": "Andrew Jones", "email": "ajones@ventanamicro.com", "time": "Wed Aug 21 19:56:09 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Aug 30 11:04:06 2024 +0100" }, "message": "riscv: Set SBI_SUCCESS on successful DBCN call\n\nEnsure we explicitly set SBI_SUCCESS on a successful SBI calls\nsince KVM will not initialize it to zero for us. Only DBCN was\nneglecting to do so.\n\nFixes: 4ddaa4249e0c (\"riscv: Handle SBI DBCN calls from Guest/VM\")\nSigned-off-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240821142610.3297483-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "fa958fb68cfbab62b798ec7fe78b150a2dfafaf8", "tree": "ae4ebbb609c6a505554f902d8e7b7b2fbdd51f97", "parents": [ "01171537bcc043c80b0099933c1cbe01d627a0f1" ], "author": { "name": "Atish Patra", "email": "atishp@rivosinc.com", "time": "Wed Aug 21 19:56:08 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Aug 30 11:04:06 2024 +0100" }, "message": "riscv: Add Sscofpmf extensiona support\n\nWhen the Sscofpmf extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Atish Patra \u003catishp@rivosinc.com\u003e\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240821142610.3297483-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "01171537bcc043c80b0099933c1cbe01d627a0f1", "tree": "2a0c4bbcdbf51c8c7300826f8c372f2abc388a3c", "parents": [ "0592f8f829c843ff5cb2d108c309e32f4f6f5379" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Wed Aug 21 19:56:07 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Aug 30 11:04:06 2024 +0100" }, "message": "Sync-up headers with Linux-6.10 kernel\n\nWe sync-up Linux headers to get latest KVM RISC-V headers having\nSscofpmf support.\n\nSigned-off-by: Anup Patel Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240821142610.3297483-2-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "0592f8f829c843ff5cb2d108c309e32f4f6f5379", "tree": "69eede585d5a2bcf90d8990348cc94b2bd1218cd", "parents": [ "ca31abf5d9c3453c852b263ccb451751b29b944b" ], "author": { "name": "Andre Przywara", "email": "andre.przywara@arm.com", "time": "Thu Aug 01 12:10:54 2024 +0100" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Aug 05 14:36:57 2024 +0100" }, "message": "remove wordsize.h inclusion (for musl compatibility)\n\nThe wordsize.h header file and the __WORDSIZE definition do not seem\nto be universal, the musl libc for instance has the definition in a\ndifferent header file. This breaks compilation of kvmtool against musl.\n\nThe two leading underscores suggest a compiler-internal symbol anyway, so\nlet\u0027s just remove that particular macro usage entirely, and replace it\nwith the number we really want: the size of a \"long\" type.\n\nReported-by: J. Neuschäfer \u003cj.neuschaefer@gmx.net\u003e\nSigned-off-by: Andre Przywara \u003candre.przywara@arm.com\u003e\nReviewed-by: Alexandru Elisei \u003calexandru.elisei@arm.com\u003e\nLink: https://lore.kernel.org/r/20240801111054.818765-1-andre.przywara@arm.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "ca31abf5d9c3453c852b263ccb451751b29b944b", "tree": "252869446585151ee8c2ccbfbf163e87b53e9bad", "parents": [ "32f810364df085850b8e2cd0515606cfe70c64bf" ], "author": { "name": "Oliver Upton", "email": "oliver.upton@linux.dev", "time": "Thu Jun 20 16:57:03 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Jul 05 11:39:39 2024 +0100" }, "message": "arm64: Allow the user to select the max SVE vector length\n\nAdd a new flag, --sve-max-vl, which allows the user to specify an SVE\nvector length for the VM. Just zero out unsupported VLs from what KVM\nsupports rather than cooking up the bitmap from scratch.\n\nSigned-off-by: Oliver Upton \u003coliver.upton@linux.dev\u003e\nLink: https://lore.kernel.org/r/20240620165702.1134918-2-oliver.upton@linux.dev\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "32f810364df085850b8e2cd0515606cfe70c64bf", "tree": "022ebef5e9938e2e4efc93ebd1ad3b8079aa1979", "parents": [ "a20adc64b4ea5dfb8c6ef9cec296830590b0950b" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Tue May 14 11:19:28 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Jul 05 11:36:18 2024 +0100" }, "message": "riscv: Add Zacas extensiona support\n\nWhen the Zacas extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240514054928.854419-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "a20adc64b4ea5dfb8c6ef9cec296830590b0950b", "tree": "a925b8d2ce8c64a06dfd22f990e683313788e795", "parents": [ "85aaadf64649698c3eb2cfbc8df81d0880141744" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Tue May 14 11:19:27 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Jul 05 11:36:18 2024 +0100" }, "message": "riscv: Add Ztso extensiona support\n\nWhen the Ztso extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240514054928.854419-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "85aaadf64649698c3eb2cfbc8df81d0880141744", "tree": "483aa800b6c6fbcde83718142309c2eb9e34ea87", "parents": [ "da4cfc3e540341b84c4bbad705b5a15865bc1f80" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Tue May 14 11:19:26 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Jul 05 11:36:18 2024 +0100" }, "message": "Sync-up headers with Linux-6.9 kernel\n\nWe sync-up Linux headers to get latest KVM RISC-V headers having\nZtso and Zacas support.\n\nSigned-off-by: Anup Patel Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240514054928.854419-2-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "da4cfc3e540341b84c4bbad705b5a15865bc1f80", "tree": "3f10fbcbc2fed7d99d13b9b1956ad67dcef0d769", "parents": [ "d38c8f76ebe20c94329cb75aeb21eb061e975798" ], "author": { "name": "Sicheng Liu", "email": "lsc2001@outlook.com", "time": "Sat Mar 30 08:41:49 2024 +0000" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:06:44 2024 +0100" }, "message": "x86: Fix some memory sizes when setting up bios\n\nIn e820_setup(), the memory region of MB_BIOS is [MB_BIOS_BEGIN, MB_BIOS_END],\nso its memory size should be MB_BIOS_SIZE (\u003d MB_BIOS_END - MB_BIOS_BEGIN + 1).\nThe same thing goes for BDA, EBDA, MB_BIOS and VGA_ROM in setup_bios().\nBy the way, a little change is made in setup_irq_handler() to avoid using\nhard coding.\n\nSigned-off-by: Sicheng Liu \u003clsc2001@outlook.com\u003e\nLink: https://lore.kernel.org/r/SY6P282MB373318D6241D56E074B040DFA3392@SY6P282MB3733.AUSP282.PROD.OUTLOOK.COM\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d38c8f76ebe20c94329cb75aeb21eb061e975798", "tree": "a3601d2489e4c9405bca9a74651d43943bd84b6e", "parents": [ "9cf213d609bcf7958325efacd97ca07e2bffe11a" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:41 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Allow disabling SBI STA extension for Guest\n\nWe add \"--disable-sbi-sta\" options to allow users disable SBI steal-time\nextension for the Guest.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-11-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "9cf213d609bcf7958325efacd97ca07e2bffe11a", "tree": "68672c53a6c6d7ed88f18efdb6b4c95e5f16a20c", "parents": [ "5a64c1eadf79826853f3dad92c69f9d690151e11" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:40 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add Zfa extensiona support\n\nWhen the Zfa extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-10-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "5a64c1eadf79826853f3dad92c69f9d690151e11", "tree": "cca9ea03d028e482b5884ad3c0884cce5575acca", "parents": [ "fce2865286b5a44dd8ea6a5d37b3c3e8c98545c3" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:39 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add Zvfh[min] extensions support\n\nWhen the Zvfh[min] extensions are available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-9-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "fce2865286b5a44dd8ea6a5d37b3c3e8c98545c3", "tree": "972eec86e45482707a4c9123ddadae622fe989b1", "parents": [ "bd7f13c1a19fb6386724a9c12814850f21f7db08" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:38 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add Zihintntl extension support\n\nWhen the Zihintntl extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-8-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "bd7f13c1a19fb6386724a9c12814850f21f7db08", "tree": "82db775bccc797772df485f2c5395fbcfaf3f7c0", "parents": [ "65b58f723ec3898a36a37a60449b2cad22360fa5" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:37 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add Zfh[min] extensions support\n\nWhen the Zfh[min] extensions are available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-7-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "65b58f723ec3898a36a37a60449b2cad22360fa5", "tree": "9d9199a05a390e6961b1fe8895cb1cf29c18479d", "parents": [ "d9052a965a22a3a2b96668222e384fb5d1747664" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:36 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add vector crypto extensions support\n\nWhen the vector extensions are available expose them to the guest\nvia device tree so that guest can use it. This includes extensions\nZvbb, Zvbc, Zvkb, Zvkg, Zvkned, Zvknha, Zvknhb, Zvksed, Zvksh,\nand Zvkt.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-6-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "d9052a965a22a3a2b96668222e384fb5d1747664", "tree": "76a36a381ef95a2a9b9afde8665973c637517432", "parents": [ "8b4cc7051393bddb1939c6636da91fb17cf1e39e" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:35 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add scalar crypto extensions support\n\nWhen the scalar extensions are available expose them to the guest\nvia device tree so that guest can use it. This includes extensions\nZbkb, Zbkc, Zbkx, Zknd, Zkne, Zknh, Zkr, Zksed, Zksh, and Zkt.\n\nThe Zkr extension requires SEED CSR emulation in user space so\nwe also add related KVM_EXIT_RISCV_CSR handling.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-5-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "8b4cc7051393bddb1939c6636da91fb17cf1e39e", "tree": "5e7b4c225ae92ac682866e880e0e2cc99cd01155", "parents": [ "f8c9614c4696ac6df435e5ac63381ec558527369" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:34 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "riscv: Add Zbc extension support\n\nWhen the Zbc extension is available expose it to the guest\nvia device tree so that guest can use it.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-4-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "f8c9614c4696ac6df435e5ac63381ec558527369", "tree": "d1622bc566c4708c9117b3d27df0d1326fa1eec5", "parents": [ "9968468141fc441d2bc9891ea59ae09eb1e358bf" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:33 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "kvmtool: Fix absence of __packed definition\n\nThe absence of __packed definition in kvm/compiler.h cause build\nfailer after syncing kernel headers with Linux-6.8 because the\nkernel header uapi/linux/virtio_pci.h uses __packed for structures.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nReviewed-by: Andrew Jones \u003cajones@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-3-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "9968468141fc441d2bc9891ea59ae09eb1e358bf", "tree": "3417c32c1f0bf11163488c8d292958f68300ccb7", "parents": [ "4d2c017f41533b0e51e00f689050c26190a15318" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Mon Mar 25 21:01:32 2024 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Tue Apr 09 16:01:58 2024 +0100" }, "message": "Sync-up headers with Linux-6.8 for KVM RISC-V\n\nWe sync-up Linux headers to get latest KVM RISC-V headers having\nZbc, Scalar crypto, Vector crypto, Zfh[min], Zihintntl, Zvfh[min],\nZfa, and SBI steal-time support.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20240325153141.6816-2-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4d2c017f41533b0e51e00f689050c26190a15318", "tree": "c49e870c8653a5bc9941d1066b1e429c1f61443d", "parents": [ "e73a6b29f1ebf30c44f59a0a228ebed70aa76586" ], "author": { "name": "Yanwu Shen", "email": "ywsplz@gmail.com", "time": "Mon Mar 04 02:36:59 2024 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Mon Mar 04 13:56:03 2024 +0000" }, "message": "Fix 9pfs open device file security flaw\n\nOur team found that a public QEMU\u0027s 9pfs security issue[1] also exists\nin upstream kvmtool\u0027s 9pfs device. A privileged guest user can create\nand access the special device file (e.g., block files) in the shared\nfolder, allowing the malicious user to access the host device and\nacheive privilege escalation.\n\nThe virtio_p9_open function code on the 9p.c only checks file directory\nattributes, but does not check special files. Special device files can\nbe filtered on the device through the S_IFREG and S_IFDIR flag bits.\n\n[1] https://cve.mitre.org/cgi-bin/cvename.cgi?name\u003dCVE-2023-2861\nLink: https://lore.kernel.org/r/20240303183659.20656-1-ywsplz@gmail.com\nSigned-off-by: Yanwu Shen \u003cywsPlz@gmail.com\u003e\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "e73a6b29f1ebf30c44f59a0a228ebed70aa76586", "tree": "009279779280aabfdf19f60c3a5d147e72603c09", "parents": [ "f6cc06d6b53540b0c8d9eada04fb6c5bd90e56fd" ], "author": { "name": "Tengfei Yu", "email": "moehanabichan@gmail.com", "time": "Mon Jan 29 20:33:10 2024 +0800" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Feb 09 15:47:55 2024 +0000" }, "message": "x86: Enable in-kernel irqchip before creating PIT\n\nAs the kvm api(https://docs.kernel.org/virt/kvm/api.html) reads,\nKVM_CREATE_PIT2 call is only valid after enabling in-kernel irqchip\nsupport via KVM_CREATE_IRQCHIP.\n\nSigned-off-by: Tengfei Yu \u003cmoehanabichan@gmail.com\u003e\nLink: https://lore.kernel.org/r/20240129123310.28118-1-moehanabichan@gmail.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "f6cc06d6b53540b0c8d9eada04fb6c5bd90e56fd", "tree": "2bb21bdbeef1f88045b0493bf5e7f9a6ddc72d20", "parents": [ "4ddaa4249e0c59a9ef6e09c1e32b042dd01e4c08" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Thu Nov 30 09:46:33 2023 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Feb 09 15:47:19 2024 +0000" }, "message": "riscv: Fix guest poweroff when using PLIC emulation\n\nRecently due to commit 74af1456dfa0, the virtio device emulation\nin KVMTOOL now calls irq__update_msix_route() upon guest poweroff\nwhich results in KVMTOOL crash when Guest uses PLIC emulation in\nuser space. This is because irq__update_msix_route() expects the\nirq_routing table to be available but the KVMTOOL PLIC emulation\ndoes not populate any irq_routing entries.\n\nFixes: 74af1456dfa0 (\"virtio: Cancel and join threads when exiting devices devices\")\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20231130041633.78725-1-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" }, { "commit": "4ddaa4249e0c59a9ef6e09c1e32b042dd01e4c08", "tree": "8ba77914569af390b3f2dd6c76e280edd29956c8", "parents": [ "ef89838e376037602eab589382520bb0a76e9cbb" ], "author": { "name": "Anup Patel", "email": "apatel@ventanamicro.com", "time": "Tue Nov 28 20:26:28 2023 +0530" }, "committer": { "name": "Will Deacon", "email": "will@kernel.org", "time": "Fri Feb 09 15:45:22 2024 +0000" }, "message": "riscv: Handle SBI DBCN calls from Guest/VM\n\nThe new SBI DBCN functions are forwarded by in-kernel KVM RISC-V module\nto user-space so let us handle these calls in kvm_cpu_riscv_sbi() function.\n\nSigned-off-by: Anup Patel \u003capatel@ventanamicro.com\u003e\nLink: https://lore.kernel.org/r/20231128145628.413414-11-apatel@ventanamicro.com\nSigned-off-by: Will Deacon \u003cwill@kernel.org\u003e\n" } ], "next": "ef89838e376037602eab589382520bb0a76e9cbb" }