Revert "HAX: HAX: HAX: Nobble some CPUs to test error handling paths"

This reverts commit 1d7a27621e3c283e84c325242a6d5fe2154f7b09.

arch/arm64/kernel/cpufeature.c

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 56690af..80f6b5a 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -3641,8 +3641,6 @@ static void check_early_cpu_features(void)
 	verify_cpu_asid_bits();
 
 	verify_local_cpu_caps(SCOPE_BOOT_CPU);
-	if (smp_processor_id() == 60)
-		cpu_die_early();
 }
 
 static void

arch/arm64/kernel/head.S

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index e6810e1..8876674 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -372,9 +372,9 @@
 	mov	x20, x0				// preserve boot mode
 
 #ifdef CONFIG_ARM64_VA_BITS_52
-//alternative_if ARM64_HAS_VA52
+alternative_if ARM64_HAS_VA52
 	bl	__cpu_secondary_check52bitva
-//alternative_else_nop_endif
+alternative_else_nop_endif
 #endif
 
 	bl	__cpu_setup			// initialise processor
@@ -472,10 +472,6 @@
 	b.lt    __no_granule_support
 	cmp     x3, #ID_AA64MMFR0_EL1_TGRAN_SUPPORTED_MAX
 	b.gt    __no_granule_support
-	mrs	x3, mpidr_el1
-	and	x3, x3, #0xffff
-	sub	x3, x3, #0x100
-	cbz	x3, __no_granule_support
 	phys_to_ttbr x2, x2
 	msr	ttbr0_el1, x2			// load TTBR0
 	load_ttbr1 x1, x1, x3
@@ -487,10 +483,6 @@
 
 #ifdef CONFIG_ARM64_VA_BITS_52
 SYM_FUNC_START(__cpu_secondary_check52bitva)
-	mrs	x0, mpidr_el1
-	and	x0, x0, #0xffff
-	sub	x0, x0, #0x200
-	cbnz	x0, 2f
 #ifndef CONFIG_ARM64_LPA2
 	mrs_s	x0, SYS_ID_AA64MMFR2_EL1
 	and	x0, x0, ID_AA64MMFR2_EL1_VARange_MASK