)]}'
{
  "commit": "9edf489aec70c6b3de56878d1fb613e2465c8ca6",
  "tree": "d247903a250bf9fd7b022a995a9922983f059902",
  "parents": [
    "fe4ac4f11ef7b793b6f4c9dcb0f3fdb410a194a2"
  ],
  "author": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Tue Jul 14 07:42:32 2026 -0700"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Tue Jul 14 07:42:32 2026 -0700"
  },
  "message": "mcelog: Fix cache level message\n\nThe cache level is encoded in a 2-bit field in the MCACOD part of the\nIA32_MCi_STATUS MSR. Encodings are:\n\n00 - Level 1\n01 - Level 2\n10 - Level 3\n11 - Generic\n\nWhen setting the LEVEL environment variable passed to trigger scripts\nmcelog simply adds \"1\" to the reported level. This results in generic\nerrors reported:\n\n\tLevel 4 cache error threshold\n\nFix to set LEVEL to \"Generic\" instead of \"4\".\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d73ab70b2eec078eb1fe721400281df841ba6836",
      "old_mode": 33188,
      "old_path": "yellow.c",
      "new_id": "c92d256f5bc4e1b89c96b2a2885eeba10aceb159",
      "new_mode": 33188,
      "new_path": "yellow.c"
    }
  ]
}