blob: ea9f3b06525cbfe2fb76ed17fcbc777e68da2625 [file]
// SPDX-License-Identifier: GPL-2.0
cxl-enable-port(1)
==================
NAME
----
cxl-enable-port - activate / hot-add a given CXL port
SYNOPSIS
--------
[verse]
'cxl enable-port' <port0> [<port1>..<portN>] [<options>]
A port typically autoenables at initial device discovery. However, if it
was manually disabled this command can trigger the kernel to activate it
again. This involves detecting the state of the HDM (Host Managed Device
Memory) Decoders and validating that CXL.mem is enabled for each port in
the device's hierarchy.
include::xable-no-op.txt[]
OPTIONS
-------
-e::
--endpoint::
Toggle from treating the port arguments as Switch Port identifiers to
Endpoint Port identifiers.
-m::
--enable-memdevs::
Try to enable descendant memdevs after enabling the port. Recall that a
memdev is only enabled after all CXL ports in its device topology
ancestry are enabled.
Note: The '-m' option requires release v83 or newer when used with
kernel v6.18 or later. Older releases (before v83) will not work
because kernel v6.18 changed how CXL ports and downstream ports are
enumerated. In these newer kernels, the CXL port hierarchy is only
established once the memdev is probed. v83 and later remain fully
compatible with both older and newer kernels.
include::debug-option.txt[]
include::../copyright.txt[]
SEE ALSO
--------
linkcxl:cxl-disable-port[1]