commit | 7207c7f9d74816c32783a394d8072d1f978157ac | [log] [tgz] |
---|---|---|
author | Leon Alrae <leon.alrae@imgtec.com> | Mon Jul 07 11:23:59 2014 +0100 |
committer | Leon Alrae <leon.alrae@imgtec.com> | Mon Nov 03 11:48:34 2014 +0000 |
tree | 05c22755fc89eceee9d23533de96bc06d9abdd97 | |
parent | 2fb58b73746e2f99ac85e82160277b18b18279be [diff] |
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1} PageGrain needs rw bitmask which differs between MIPS architectures. In pre-R6 if RIXI is supported, PageGrain.XIE and PageGrain.RIE are writeable, whereas in R6 they are read-only 1. On MIPS64 mtc0 instruction left shifts bits 31:30 for MIPS32 backward compatiblity, therefore there are separate mtc0 and dmtc0 helpers. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>