arch/arm64/boot/dts/renesas/r8a7795.dtsi

/*
 * Device Tree Source for the r8a7795 SoC
 *
 * Copyright (C) 2015-2016 Renesas Electronics Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "renesas,r8a7795";
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		csi2_20 = &csi2_20;
		csi2_21 = &csi2_21;
		csi2_40 = &csi2_40;
		csi2_41 = &csi2_41;
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		spi1 = &msiof0;
		spi2 = &msiof1;
		spi3 = &msiof2;
		spi4 = &msiof3;
		vin0 = &vin0;
		vin1 = &vin1;
		vin2 = &vin2;
		vin3 = &vin3;
		vin4 = &vin4;
		vin5 = &vin5;
		vin6 = &vin6;
		vin7 = &vin7;
		tsc0 = &tsc1;
		tsc1 = &tsc2;
		tsc2 = &tsc3;
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		a57_0: cpu@0 {
			compatible = "arm,cortex-a57", "arm,armv8";
			reg = <0x0>;
			device_type = "cpu";
			enable-method = "psci";
			clocks =<&cpg CPG_CORE R8A7795_CLK_Z>;
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group0_opp_tb0>,
				<&group0_opp_tb1>, <&group0_opp_tb2>,
				<&group0_opp_tb3>, <&group0_opp_tb4>,
				<&group0_opp_tb5>, <&group0_opp_tb6>;
		};

		a57_1: cpu@1 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x1>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group0_opp_tb0>,
				<&group0_opp_tb1>, <&group0_opp_tb2>,
				<&group0_opp_tb3>, <&group0_opp_tb4>,
				<&group0_opp_tb5>, <&group0_opp_tb6>;
		};
		a57_2: cpu@2 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x2>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group0_opp_tb0>,
				<&group0_opp_tb1>, <&group0_opp_tb2>,
				<&group0_opp_tb3>, <&group0_opp_tb4>,
				<&group0_opp_tb5>, <&group0_opp_tb6>;
		};
		a57_3: cpu@3 {
			compatible = "arm,cortex-a57","arm,armv8";
			reg = <0x3>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group0_opp_tb0>,
				<&group0_opp_tb1>, <&group0_opp_tb2>,
				<&group0_opp_tb3>, <&group0_opp_tb4>,
				<&group0_opp_tb5>, <&group0_opp_tb6>;
		};

		a53_0: cpu@100 {
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x100>;
			device_type = "cpu";
			enable-method = "psci";
			clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group1_opp_tb>;
		};

		a53_1: cpu@101 {
			compatible = "arm,cortex-a53","arm,armv8";
			reg = <0x101>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group1_opp_tb>;
		};

		a53_2: cpu@102 {
			compatible = "arm,cortex-a53","arm,armv8";
			reg = <0x102>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group1_opp_tb>;
		};

		a53_3: cpu@103 {
			compatible = "arm,cortex-a53","arm,armv8";
			reg = <0x103>;
			device_type = "cpu";
			enable-method = "psci";
			cpu-idle-states = <&CPU_SLEEP_0>;
			operating-points-v2 = <&group1_opp_tb>;
		};

		idle-states {
			entry-method = "psci";

			CPU_SLEEP_0: cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x0010000>;
				local-timer-stop;
				entry-latency-us = <639>;
				exit-latency-us = <680>;
				min-residency-us = <1088>;
			};
		};
	};

	group0_opp_tb0: avs_tb0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <870000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <1030000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb1: avs_tb1{
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <870000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <1030000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb2: avs_tb2 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <870000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <950000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <1030000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb3: avs_tb3 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <850000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <900000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <900000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <980000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb4: avs_tb4 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <790000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <830000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <880000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <880000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <960000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb5: avs_tb5 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <770000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <770000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <770000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <780000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <860000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <860000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <940000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group0_opp_tb6: avs_tb6 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <750000>;
			clock-latency-ns = <300000>;
		};
		opp@1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <750000>;
			clock-latency-ns = <300000>;
		};
		opp@1500000000 {
			opp-hz = /bits/ 64 <1500000000>;
			opp-microvolt = <750000>;
			clock-latency-ns = <300000>;
		};
		opp@1600000000 {
			opp-hz = /bits/ 64 <1600000000>;
			opp-microvolt = <770000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1700000000 {
			opp-hz = /bits/ 64 <1700000000>;
			opp-microvolt = <850000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1800000000 {
			opp-hz = /bits/ 64 <1800000000>;
			opp-microvolt = <850000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
		opp@1900000000 {
			opp-hz = /bits/ 64 <1900000000>;
			opp-microvolt = <930000>;
			clock-latency-ns = <300000>;
			turbo-mode;
		};
	};

	group1_opp_tb: grp1_opp_tb0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp@1200000000 {
			opp-hz = /bits/ 64 <1200000000>;
			opp-microvolt = <820000>;
			clock-latency-ns = <300000>;
		};
	};

	extal_clk: extal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

	extalr_clk: extalr {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

	/*
	 * The external audio clocks are configured as 0 Hz fixed frequency
	 * clocks by default.
	 * Boards that provide audio clocks should override them.
	 */
	audio_clk_a: audio_clk_a {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	audio_clk_b: audio_clk_b {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	audio_clk_c: audio_clk_c {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	/* External SCIF clock - to be overridden by boards that provide it */
	scif_clk: scif {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
		status = "disabled";
	};

	/* External PCIe clock - can be overridden by the board */
	pcie_bus_clk: pcie_bus_clk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
		clock-output-names = "pcie_bus";
		status = "disabled";
	};

	soc {
		compatible = "simple-bus";
		interrupt-parent = <&gic>;

		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gic: interrupt-controller@0xf1010000 {
			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0x0 0xf1010000 0 0x1000>,
			      <0x0 0xf1020000 0 0x2000>;
			interrupts = <GIC_PPI 9
					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
		};

		gpio0: gpio@e6050000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6050000 0 0x50>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 0 16>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 912>;
			power-domains = <&pd_always_on>;
		};

		gpio1: gpio@e6051000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6051000 0 0x50>;
			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 32 28>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 911>;
			power-domains = <&pd_always_on>;
		};

		gpio2: gpio@e6052000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6052000 0 0x50>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 64 15>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 910>;
			power-domains = <&pd_always_on>;
		};

		gpio3: gpio@e6053000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6053000 0 0x50>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 96 16>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 909>;
			power-domains = <&pd_always_on>;
		};

		gpio4: gpio@e6054000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6054000 0 0x50>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 128 18>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 908>;
			power-domains = <&pd_always_on>;
		};

		gpio5: gpio@e6055000 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055000 0 0x50>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 160 26>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 907>;
			power-domains = <&pd_always_on>;
		};

		gpio6: gpio@e6055400 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055400 0 0x50>;
			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 192 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 906>;
			power-domains = <&pd_always_on>;
		};

		gpio7: gpio@e6055800 {
			compatible = "renesas,gpio-r8a7795",
				     "renesas,gpio-rcar";
			reg = <0 0xe6055800 0 0x50>;
			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 224 4>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 905>;
			power-domains = <&pd_always_on>;
		};

		pmu {
			compatible = "arm,armv8-pmuv3";
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-affinity = <&a57_0>,
					     <&a57_1>,
					     <&a57_2>,
					     <&a57_3>,
					     <&a53_0>,
					     <&a53_1>,
					     <&a53_2>,
					     <&a53_3>;
		};

		timer {
			compatible = "arm,armv8-timer";
			interrupts = <GIC_PPI 13
					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
				     <GIC_PPI 14
					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
				     <GIC_PPI 11
					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
				     <GIC_PPI 10
					(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
			clock-frequency = <8333333>;
		};

		wdt0: wdt@e6020000 {
			compatible = "renesas,rwdt-r8a7795", "renesas,rwdt";
			reg = <0 0xe6020000 0 0x0c>;
			clocks = <&cpg CPG_MOD 402>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		cpg: clock-controller@e6150000 {
			compatible = "renesas,r8a7795-cpg-mssr";
			reg = <0 0xe6150000 0 0x1000>;
			clocks = <&extal_clk>, <&extalr_clk>;
			clock-names = "extal", "extalr";
			#clock-cells = <2>;
			#power-domain-cells = <0>;
		};

		csi2_20: csi2@fea80000 {
			compatible = "renesas,csi2-r8a7795";
			reg = <0 0xfea80000 0 0x10000>;
			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 714>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		csi2_21: csi2@fea90000 {
			compatible = "renesas,csi2-r8a7795";
			reg = <0 0xfea90000 0 0x10000>;
			interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 713>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		csi2_40: csi2@feaa0000 {
			compatible = "renesas,csi2-r8a7795";
			reg = <0 0xfeaa0000 0 0x10000>;
			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 716>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		csi2_41: csi2@feab0000 {
			compatible = "renesas,csi2-r8a7795";
			reg = <0 0xfeab0000 0 0x10000>;
			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 715>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		sysc: system-controller@e6180000 {
			compatible = "renesas,rcar-gen3-sysc";
			reg = <0 0xe6180000 0 0x0400>;

			pm-domains {
				pd_always_on: always_on {
					#address-cells = <1>;
					#size-cells = <0>;
					#power-domain-cells = <0>;

					pd_a3sg: a3sg {
						reg = <0x0100>;
						#power-domain-cells = <0>;
					};

					pd_a3ir: a3ir {
						reg = <0x0180>;
						#power-domain-cells = <0>;
					};

					pd_a3vp: a3vp {
						reg = <0x0340>;
						#power-domain-cells = <0>;
					};

					pd_a3vc: a3vc {
						reg = <0x0380>;
						#address-cells = <1>;
						#size-cells = <0>;
						#power-domain-cells = <0>;

						pd_a2vc0: a2vc0 {
							reg = <0x03C0>;
							#power-domain-cells = <0>;
						};

						pd_a2vc1: a2vc1 {
							reg = <0x03C0>;
							#power-domain-cells = <0>;
						};
					};
				};
			};
		};

		audma0: dma-controller@ec700000 {
			compatible = "renesas,rcar-dmac";
			reg = <0 0xec700000 0 0x10000>;
			interrupts =	<0 350 IRQ_TYPE_LEVEL_HIGH
					 0 320 IRQ_TYPE_LEVEL_HIGH
					 0 321 IRQ_TYPE_LEVEL_HIGH
					 0 322 IRQ_TYPE_LEVEL_HIGH
					 0 323 IRQ_TYPE_LEVEL_HIGH
					 0 324 IRQ_TYPE_LEVEL_HIGH
					 0 325 IRQ_TYPE_LEVEL_HIGH
					 0 326 IRQ_TYPE_LEVEL_HIGH
					 0 327 IRQ_TYPE_LEVEL_HIGH
					 0 328 IRQ_TYPE_LEVEL_HIGH
					 0 329 IRQ_TYPE_LEVEL_HIGH
					 0 330 IRQ_TYPE_LEVEL_HIGH
					 0 331 IRQ_TYPE_LEVEL_HIGH
					 0 332 IRQ_TYPE_LEVEL_HIGH
					 0 333 IRQ_TYPE_LEVEL_HIGH
					 0 334 IRQ_TYPE_LEVEL_HIGH
					 0 335 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 502>;
			clock-names = "fck";
			power-domains = <&pd_always_on>;
			#dma-cells = <1>;
			dma-channels = <16>;
		};

		audma1: dma-controller@ec720000 {
			compatible = "renesas,rcar-dmac";
			reg = <0 0xec720000 0 0x10000>;
			interrupts =	<0 351 IRQ_TYPE_LEVEL_HIGH
					 0 336 IRQ_TYPE_LEVEL_HIGH
					 0 337 IRQ_TYPE_LEVEL_HIGH
					 0 338 IRQ_TYPE_LEVEL_HIGH
					 0 339 IRQ_TYPE_LEVEL_HIGH
					 0 340 IRQ_TYPE_LEVEL_HIGH
					 0 341 IRQ_TYPE_LEVEL_HIGH
					 0 342 IRQ_TYPE_LEVEL_HIGH
					 0 343 IRQ_TYPE_LEVEL_HIGH
					 0 344 IRQ_TYPE_LEVEL_HIGH
					 0 345 IRQ_TYPE_LEVEL_HIGH
					 0 346 IRQ_TYPE_LEVEL_HIGH
					 0 347 IRQ_TYPE_LEVEL_HIGH
					 0 348 IRQ_TYPE_LEVEL_HIGH
					 0 349 IRQ_TYPE_LEVEL_HIGH
					 0 382 IRQ_TYPE_LEVEL_HIGH
					 0 383 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 501>;
			clock-names = "fck";
			power-domains = <&pd_always_on>;
			#dma-cells = <1>;
			dma-channels = <16>;
		};

		pfc: pfc@e6060000 {
			compatible = "renesas,pfc-r8a7795";
			reg = <0 0xe6060000 0 0x50c>;
		};

		dmac0: dma-controller@e6700000 {
			compatible = "renesas,rcar-dmac";
			reg = <0 0xe6700000 0 0x10000>;
			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 219>;
			clock-names = "fck";
			power-domains = <&pd_always_on>;
			#dma-cells = <1>;
			dma-channels = <16>;
		};

		dmac1: dma-controller@e7300000 {
			compatible = "renesas,rcar-dmac";
			reg = <0 0xe7300000 0 0x10000>;
			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					"ch0", "ch1", "ch2", "ch3",
					"ch4", "ch5", "ch6", "ch7",
					"ch8", "ch9", "ch10", "ch11",
					"ch12", "ch13", "ch14", "ch15";
			clocks = <&cpg CPG_MOD 218>;
			clock-names = "fck";
			power-domains = <&pd_always_on>;
			#dma-cells = <1>;
			dma-channels = <16>;
		};

		dmac2: dma-controller@e7310000 {
			/* Empty node for now */
		};

		avb: ethernet@e6800000 {
			compatible = "renesas,etheravb-r8a7795";
			reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch11",
					  "ch12", "ch13", "ch14", "ch15",
					  "ch16", "ch17", "ch18", "ch19",
					  "ch20", "ch21", "ch22", "ch23",
					  "ch24";
			clocks = <&cpg CPG_MOD 812>;
			power-domains = <&pd_always_on>;
			phy-mode = "rgmii-id";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		pwm0: pwm@e6e30000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e30000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm1: pwm@e6e31000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e31000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm2: pwm@e6e32000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e32000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm3: pwm@e6e33000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e33000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm4: pwm@e6e34000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e34000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm5: pwm@e6e35000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e35000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pwm6: pwm@e6e36000 {
			compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
			reg = <0 0xe6e36000 0 0x10>;
			#pwm-cells = <2>;
			clocks = <&cpg CPG_MOD 523>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		hscif0: serial@e6540000 {
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe6540000 0 96>;
			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 520>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x31>, <&dmac1 0x30>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		hscif1: serial@e6550000 {
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe6550000 0 96>;
			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 519>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x33>, <&dmac1 0x32>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		hscif2: serial@e6560000 {
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe6560000 0 96>;
			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 518>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x35>, <&dmac1 0x34>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		hscif3: serial@e66a0000 {
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe66a0000 0 96>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 517>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		hscif4: serial@e66b0000 {
			compatible = "renesas,hscif-r8a7795",
				     "renesas,rcar-gen3-hscif",
				     "renesas,hscif";
			reg = <0 0xe66b0000 0 96>;
			interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 516>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x39>, <&dmac0 0x38>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif0: serial@e6e60000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6e60000 0 64>;
			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 207>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x51>, <&dmac1 0x50>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif1: serial@e6e68000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6e68000 0 64>;
			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 206>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x53>, <&dmac1 0x52>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif2: serial@e6e88000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6e88000 0 64>;
			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 310>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif3: serial@e6c50000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6c50000 0 64>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 204>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x57>, <&dmac0 0x56>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif4: serial@e6c40000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6c40000 0 64>;
			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 203>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x59>, <&dmac0 0x58>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		scif5: serial@e6f30000 {
			compatible = "renesas,scif-r8a7795",
				     "renesas,rcar-gen3-scif", "renesas,scif";
			reg = <0 0xe6f30000 0 64>;
			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 202>,
				 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		usb2_phy0: usb-phy@ee080200 {
			compatible = "renesas,usb2-phy-r8a7795";
			reg = <0 0xee080200 0 0x700>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			power-domains = <&pd_always_on>;
			#phy-cells = <0>;
			status = "disabled";
		};

		usb2_phy1: usb-phy@ee0a0200 {
			compatible = "renesas,usb2-phy-r8a7795";
			reg = <0 0xee0a0200 0 0x700>;
			clocks = <&cpg CPG_MOD 702>;
			power-domains = <&pd_always_on>;
			#phy-cells = <0>;
			status = "disabled";
		};

		usb2_phy2: usb-phy@ee0c0200 {
			compatible = "renesas,usb2-phy-r8a7795";
			reg = <0 0xee0c0200 0 0x700>;
			clocks = <&cpg CPG_MOD 701>;
			power-domains = <&pd_always_on>;
			#phy-cells = <0>;
			status = "disabled";
		};

		ehci0: usb@ee080100 {
			compatible = "renesas,ehci-r8a7795", "generic-ehci";
			reg = <0 0xee080100 0 0xff>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci1: usb@ee0a0100 {
			compatible = "renesas,ehci-r8a7795", "generic-ehci";
			reg = <0 0xee0a0100 0 0xff>;
			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 702>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy1>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci2: usb@ee0c0100 {
			compatible = "renesas,ehci-r8a7795", "generic-ehci";
			reg = <0 0xee0c0100 0 0xff>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 701>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy2>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci0: usb@ee080000 {
			compatible = "renesas,ohci-r8a7795", "generic-ohci";
			reg = <0 0xee080000 0 0xff>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci1: usb@ee0a0000 {
			compatible = "renesas,ohci-r8a7795", "generic-ohci";
			reg = <0 0xee0a0000 0 0xff>;
			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 702>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy1>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci2: usb@ee0c0000 {
			compatible = "renesas,ohci-r8a7795", "generic-ohci";
			reg = <0 0xee0c0000 0 0xff>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 701>;
			power-domains = <&pd_always_on>;
			phys = <&usb2_phy2>;
			phy-names = "usb";
			status = "disabled";
		};

		hsusb: usb@e6590000 {
			compatible = "renesas,usbhs-r8a7795",
				     "renesas,rcar-gen3-usbhs";
			reg = <0 0xe6590000 0 0x100>;
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 704>;
			renesas,buswait = <11>;
			phys = <&usb2_phy0>;
			phy-names = "usb";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		i2c0: i2c@e6500000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe6500000 0 0x40>;
			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 931>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <110>;
			status = "disabled";
		};

		i2c1: i2c@e6508000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe6508000 0 0x40>;
			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 930>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c2: i2c@e6510000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe6510000 0 0x40>;
			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 929>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c3: i2c@e66d0000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe66d0000 0 0x40>;
			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 928>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <110>;
			status = "disabled";
		};

		i2c4: i2c@e66d8000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe66d8000 0 0x40>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 927>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <110>;
			status = "disabled";
		};

		i2c5: i2c@e66e0000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe66e0000 0 0x40>;
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 919>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <110>;
			status = "disabled";
		};

		i2c6: i2c@e66e8000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,i2c-r8a7795";
			reg = <0 0xe66e8000 0 0x40>;
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 918>;
			power-domains = <&pd_always_on>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		msiof0: spi@e6e90000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,msiof-r8a7795";
			reg = <0 0xe6e90000 0 0x64>;
			interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 211>;
			dmas = <&dmac1 0x41>, <&dmac1 0x40>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		msiof1: spi@e6ea0000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,msiof-r8a7795";
			reg = <0 0xe6ea0000 0 0x0064>;
			interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 210>;
			dmas = <&dmac1 0x43>, <&dmac1 0x42>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		msiof2: spi@e6c00000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,msiof-r8a7795";
			reg = <0 0xe6c00000 0 0x0064>;
			interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 209>;
			dmas = <&dmac0 0x45>, <&dmac0 0x44>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		msiof3: spi@e6c10000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "renesas,msiof-r8a7795";
			reg = <0 0xe6c10000 0 0x0064>;
			interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 208>;
			dmas = <&dmac0 0x47>, <&dmac0 0x46>;
			dma-names = "tx", "rx";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		rcar_sound: sound@ec500000 {
			/*
			 * #sound-dai-cells is required
			 *
			 * Single DAI : #sound-dai-cells = <0>;	<&rcar_sound>;
			 * Multi  DAI : #sound-dai-cells = <1>;	<&rcar_sound N>;
			 */
			/*
			 * #clock-cells is required for audio_clkout0/1/2/3
			 *
			 * clkout	: #clock-cells = <0>;	<&rcar_sound>;
			 * clkout0/1/2/3: #clock-cells = <1>;	<&rcar_sound N>;
			 */
			compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
			reg =	<0 0xec500000 0 0x1000>, /* SCU */
				<0 0xec5a0000 0 0x100>,  /* ADG */
				<0 0xec540000 0 0x1000>, /* SSIU */
				<0 0xec541000 0 0x280>,  /* SSI */
				<0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

			clocks = <&cpg CPG_MOD 1005>,
				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
				 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
				 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
				 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
				 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
				 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
				 <&audio_clk_a>, <&audio_clk_b>,
				 <&audio_clk_c>,
				 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
			clock-names = "ssi-all",
				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
				      "ssi.1", "ssi.0",
				      "src.9", "src.8", "src.7", "src.6",
				      "src.5", "src.4", "src.3", "src.2",
				      "src.1", "src.0",
				      "dvc.0", "dvc.1",
				      "clk_a", "clk_b", "clk_c", "clk_i";
			power-domains = <&pd_always_on>;
			status = "disabled";

			rcar_sound,dvc {
				dvc0: dvc@0 {
					dmas = <&audma0 0xbc>;
					dma-names = "tx";
				};
				dvc1: dvc@1 {
					dmas = <&audma0 0xbe>;
					dma-names = "tx";
				};
			};

			rcar_sound,src {
				src0: src@0 {
					interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x85>, <&audma1 0x9a>;
					dma-names = "rx", "tx";
				};
				src1: src@1 {
					interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x87>, <&audma1 0x9c>;
					dma-names = "rx", "tx";
				};
				src2: src@2 {
					interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x89>, <&audma1 0x9e>;
					dma-names = "rx", "tx";
				};
				src3: src@3 {
					interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8b>, <&audma1 0xa0>;
					dma-names = "rx", "tx";
				};
				src4: src@4 {
					interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8d>, <&audma1 0xb0>;
					dma-names = "rx", "tx";
				};
				src5: src@5 {
					interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8f>, <&audma1 0xb2>;
					dma-names = "rx", "tx";
				};
				src6: src@6 {
					interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x91>, <&audma1 0xb4>;
					dma-names = "rx", "tx";
				};
				src7: src@7 {
					interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x93>, <&audma1 0xb6>;
					dma-names = "rx", "tx";
				};
				src8: src@8 {
					interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x95>, <&audma1 0xb8>;
					dma-names = "rx", "tx";
				};
				src9: src@9 {
					interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x97>, <&audma1 0xba>;
					dma-names = "rx", "tx";
				};
			};

			rcar_sound,ssi {
				ssi0: ssi@0 {
					interrupts = <0 370 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi1: ssi@1 {
					 interrupts = <0 371 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi2: ssi@2 {
					interrupts = <0 372 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi3: ssi@3 {
					interrupts = <0 373 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi4: ssi@4 {
					interrupts = <0 374 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi5: ssi@5 {
					interrupts = <0 375 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi6: ssi@6 {
					interrupts = <0 376 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi7: ssi@7 {
					interrupts = <0 377 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi8: ssi@8 {
					interrupts = <0 378 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi9: ssi@9 {
					interrupts = <0 379 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
			};
		};

		adsp: adsp@ec800000 {
			compatible = "renesas,r8a7795-adsp", "renesas,rcar-gen3-adsp";
			reg = <0 0xec800000 0 0x80fc>,
			      <0 0xece60000 0 0x10000>,
			      <0 0xece78000 0 0x8000>,
			      <0 0xece80000 0 0x10000>,
			      <0 0xece90000 0 0x10000>,
			      <0 0x41000000 0 0x1000000>;
			interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 506>;
			status = "disabled";
		};

		gsx: gsx@fd000000 {
			compatible = "renesas,gsx";
			reg = <0 0xfd000000 0 0x3ffff>;
			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 112>;
			power-domains = <&pd_a3sg>;
		};

		vcplf: vcp4@fe910000 {
			compatible = "renesas,vcp4-vcplf";
			reg = <0 0xfe910000 0 0x200>, <0 0xfe910200 0 0x200>;
			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 130>;
			power-domains = <&pd_a2vc1>;
		};

		vcpl4: vcp4@fe8f0000 {
			compatible = "renesas,vcp4-vcpl4";
			reg = <0 0xfe8f0000 0 0x200>, <0 0xfe8f0200 0 0x200>;
			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 129>;
			power-domains = <&pd_a2vc0>;
		};

		vdpb: vcp4@fe900000 {
			compatible = "renesas,vcp4-vdpb";
			reg = <0 0xfe900000 0 0x200>, <0 0xfe900200 0 0x200>;
			interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 131>;
			power-domains = <&pd_a2vc1>;
		};

		ivdp1c: vcp4@fe8d0000 {
			compatible = "renesas,vcp4-ivdp1c";
			reg = <0 0xfe8d0000 0 0x200>, <0 0xfe8d0200 0 0x200>;
			interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 128>;
			power-domains = <&pd_a2vc0>;
		};

		fcpcs: vcp4@fe90f000 {
			compatible = "renesas,vcp4-fcpcs";
			reg = <0 0xfe90f000 0 0x200>;
			clocks = <&cpg CPG_MOD 619>;
			power-domains = <&pd_a3vc>;
		};

		fcpci0: vcp4@fe8df000 {
			compatible = "renesas,vcp4-fcpci0";
			reg = <0 0xfe8df000 0 0x200>;
			clocks = <&cpg CPG_MOD 617>;
			power-domains = <&pd_a3vc>;
		};

		fcpci1: vcp4@fe8ff000 {
			compatible = "renesas,vcp4-fcpci1";
			reg = <0 0xfe8ff000 0 0x200>;
			clocks = <&cpg CPG_MOD 616>;
			power-domains = <&pd_a3vc>;
		};

		stb: vcp4@fe8a0000 {
			compatible = "renesas,vcp4-stb";
			reg = <0 0xfe8a0000 0 0x200>;
			interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 104>;
			power-domains = <&pd_a3vc>;
		};

		fdp0: fdpm@fe940000 {
			compatible = "renesas,fdpm";
			reg = <0 0xfe940000 0 0x2400>, <0 0xfe950000 0 0x200>;
			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 119>, <&cpg CPG_MOD 615>;
			power-domains = <&pd_a3vp>;
			renesas,#ch = <0>;
		};

		fdp1: fdpm@fe944000 {
			compatible = "renesas,fdpm";
			reg = <0 0xfe944000 0 0x2400>, <0 0xfe951000 0 0x200>;
			interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 118>, <&cpg CPG_MOD 614>;
			power-domains = <&pd_a3vp>;
			renesas,#ch = <1>;
		};

		fdp2: fdpm@fe948000 {
			compatible = "renesas,fdpm";
			reg = <0 0xfe948000 0 0x2400>, <0 0xfe952000 0 0x200>;
			interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 117>, <&cpg CPG_MOD 613>;
			power-domains = <&pd_a3vp>;
			renesas,#ch = <2>;
		};

		vin0: video@e6ef0000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef0000 0 0x1000>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 811>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin1: video@e6ef1000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef1000 0 0x1000>;
			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 810>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin2: video@e6ef2000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef2000 0 0x1000>;
			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 809>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin3: video@e6ef3000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef3000 0 0x1000>;
			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 808>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin4: video@e6ef4000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef4000 0 0x1000>;
			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 807>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin5: video@e6ef5000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef5000 0 0x1000>;
			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 806>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin6: video@e6ef6000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef6000 0 0x1000>;
			interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 805>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vin7: video@e6ef7000 {
			compatible = "renesas,vin-r8a7795";
			reg = <0 0xe6ef7000 0 0x1000>;
			interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 804>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		sdhi0: sd@ee100000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee100000 0 0x2000>;
			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 314>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-sd-highspeed;
			sd-uhs-sdr50;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <0 0x3f>;
			status = "disabled";
		};

		sdhi1: sd@ee120000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee120000 0 0x2000>;
			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 313>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-sd-highspeed;
			sd-uhs-sdr50;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <6 0x3f>;
			status = "disabled";
		};

		sdhi2: sd@ee140000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee140000 0 0x2000>;
			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 312>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-sd-highspeed;
			sd-uhs-sdr50;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <12 0x7f>;
			status = "disabled";
		};

		sdhi3: sd@ee160000 {
			compatible = "renesas,sdhi-r8a7795";
			reg = <0 0xee160000 0 0x2000>;
			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 311>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-sd-highspeed;
			sd-uhs-sdr50;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <19 0x7ff>;
			status = "disabled";
		};

		mmc0: mmc@ee140000 {
			compatible = "renesas,mmc-r8a7795";
			reg = <0 0xee140000 0 0x2000>;
			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 312>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-mmc-highspeed;
			mmc-hs200-1_8v;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <6 0x1fff>;
			status = "disabled";
		};

		mmc1: mmc@ee160000 {
			compatible = "renesas,mmc-r8a7795";
			reg = <0 0xee160000 0 0x2000>;
			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 311>;
			power-domains = <&pd_always_on>;
			renesas,clk-rate = <200000000>;
			cap-mmc-highspeed;
			mmc-hs200-1_8v;
			renesas,mmc-scc-tapnum = <8>;
			renesas,pfcs = <0xe6060000 0x380>;
			renesas,id = <19 0x7ff>;
			status = "disabled";
		};

		sata: sata@ee300000 {
			compatible = "renesas,sata-r8a7795";
			reg = <0 0xee300000 0 0x1fff>;
			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 815>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		xhci0: usb@ee000000 {
			compatible = "renesas,xhci-r8a7795";
			reg = <0 0xee000000 0 0xc00>;
			interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 328>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		xhci1: usb@ee0400000 {
			compatible = "renesas,xhci-r8a7795";
			reg = <0 0xee040000 0 0xc00>;
			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 327>;
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pciec0: pcie@fe000000 {
			compatible = "renesas,pcie-r8a7795";
			reg = <0 0xfe000000 0 0x80000>;
			#address-cells = <3>;
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>,
				<0 117 IRQ_TYPE_LEVEL_HIGH>,
				<0 118 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
			clock-names = "pcie", "pcie_bus";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		pciec1: pcie@ee800000 {
			compatible = "renesas,pcie-r8a7795";
			reg = <0 0xee800000 0 0x80000>;
			#address-cells = <3>;
			#size-cells = <2>;
			bus-range = <0x00 0xff>;
			device_type = "pci";
			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
			/* Map all possible DDR as inbound ranges */
			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
			interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>,
				<0 149 IRQ_TYPE_LEVEL_HIGH>,
				<0 150 IRQ_TYPE_LEVEL_HIGH>;
			#interrupt-cells = <1>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic 0 148 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
			clock-names = "pcie", "pcie_bus";
			power-domains = <&pd_always_on>;
			status = "disabled";
		};

		vspbc@fe920000 {
			compatible = "renesas,vspm-vsp2";
			renesas,has-bru;
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hgo;
			renesas,#rpf = <5>;
			renesas,#uds = <0>;
			renesas,#wpf = <1>;
		};

		vspbc: vspm@fe920000 {
			compatible = "renesas,vspm";
			reg = <0 0xfe920000 0 0x8000>, <0 0xfe92f000 0 0x200>;
			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 624>, <&cpg CPG_MOD 606>;
			renesas,#ch = <4>;
			renesas,#rpf = <31>;
			renesas,#rpf_clut = <4>;
			renesas,#wpf_rot = <0>;
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hgo;
			renesas,has-bru;
			renesas,#read_outstanding = <0>;
			power-domains = <&pd_a3vp>;
			status = "disabled";
		};

		vspbd@fe960000 {
			compatible = "renesas,vspm-vsp2";
			renesas,has-bru;
			renesas,#rpf = <5>;
			renesas,#uds = <0>;
			renesas,#wpf = <1>;
		};

		vspbd: vspm@fe960000 {
			compatible = "renesas,vspm";
			reg = <0 0xfe960000 0 0x8000>, <0 0xfe96f000 0 0x200>;
			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 626>, <&cpg CPG_MOD 607>;

			renesas,#ch = <3>;
			renesas,#rpf = <31>;
			renesas,#rpf_clut = <4>;
			renesas,#wpf_rot = <0>;
			renesas,has-bru;
			renesas,has-drc;
			renesas,#read_outstanding = <0>;
			power-domains = <&pd_a3vp>;
			status = "disabled";
		};

		vspi0@fe9a0000 {
			compatible = "renesas,vspm-vsp2";
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,#rpf = <1>;
			renesas,#uds = <1>;
			renesas,#wpf = <1>;
		};

		vspi0: vspm@fe9a0000 {
			compatible = "renesas,vspm";
			reg = <0 0xfe9a0000 0 0x8000>, <0 0xfe9af000 0 0x200>;
			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 631>, <&cpg CPG_MOD 611>;

			renesas,#ch = <0>;
			renesas,#rpf = <1>;
			renesas,#rpf_clut = <1>;
			renesas,#wpf_rot = <1>;
			renesas,has-sru;
			renesas,has-uds;
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hst;
			renesas,has-hsi;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,has-shp;
			renesas,#read_outstanding = <2>;
			power-domains = <&pd_a3vp>;
			status = "disabled";
		};

		vspi1@fe9b0000 {
			compatible = "renesas,vspm-vsp2";
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,#rpf = <1>;
			renesas,#uds = <1>;
			renesas,#wpf = <1>;
		};

		vspi1: vspm@fe9b0000 {
			compatible = "renesas,vspm";
			reg = <0 0xfe9b0000 0 0x8000>, <0 0xfe9bf000 0 0x200>;
			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 630>, <&cpg CPG_MOD 610>;

			renesas,#ch = <1>;
			renesas,#rpf = <1>;
			renesas,#rpf_clut = <1>;
			renesas,#wpf_rot = <1>;
			renesas,has-sru;
			renesas,has-uds;
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hst;
			renesas,has-hsi;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,has-shp;
			renesas,#read_outstanding = <2>;
			power-domains = <&pd_a3vp>;
			status = "disabled";
		};

		vspi2@fe9c0000 {
			compatible = "renesas,vspm-vsp2";
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,#rpf = <1>;
			renesas,#uds = <1>;
			renesas,#wpf = <1>;
		};

		vspi2: vspm@fe9c0000 {
			compatible = "renesas,vspm";
			reg = <0 0xfe9c0000 0 0x8000>, <0 0xfe9cf000 0 0x200>;
			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 629>, <&cpg CPG_MOD 609>;

			renesas,#ch = <2>;
			renesas,#rpf = <1>;
			renesas,#rpf_clut = <1>;
			renesas,#wpf_rot = <1>;
			renesas,has-sru;
			renesas,has-uds;
			renesas,has-lut;
			renesas,has-clu;
			renesas,has-hst;
			renesas,has-hsi;
			renesas,has-hgo;
			renesas,has-hgt;
			renesas,has-shp;
			renesas,#read_outstanding = <2>;
			power-domains = <&pd_a3vp>;
			status = "disabled";
		};

		vspd0: vsp@fea20000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea20000 0 0x8000>;
			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
			power-domains = <&pd_always_on>;
			clocks = <&cpg CPG_MOD 623>, <&cpg CPG_MOD 603>;

			renesas,has-lif;
			renesas,has-lut;
			renesas,#rpf = <5>;
			renesas,#wpf = <2>;
		};

		vspd1: vsp@fea28000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea28000 0 0x8000>;
			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
			power-domains = <&pd_always_on>;
			clocks = <&cpg CPG_MOD 622>, <&cpg CPG_MOD 602>;

			renesas,has-lif;
			renesas,has-lut;
			renesas,#rpf = <5>;
			renesas,#wpf = <2>;
		};

		vspd2: vsp@fea30000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea30000 0 0x8000>;
			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
			power-domains = <&pd_always_on>;
			clocks = <&cpg CPG_MOD 621>, <&cpg CPG_MOD 601>;

			renesas,has-lif;
			renesas,has-lut;
			renesas,#rpf = <5>;
			renesas,#wpf = <2>;
		};

		vspd3: vsp@fea38000 {
			compatible = "renesas,vsp2";
			reg = <0 0xfea38000 0 0x8000>;
			interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
			power-domains = <&pd_always_on>;
			clocks = <&cpg CPG_MOD 620>, <&cpg CPG_MOD 600>;

			renesas,has-lif;
			renesas,has-lut;
			renesas,#rpf = <5>;
			renesas,#wpf = <2>;
		};

		hdmi0: hdmi@fead0000 {
			compatible = "renesas,hdmi0";
			reg = <0 0xfead0000 0 0x10000>;
			interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 729>;
			power-domains = <&pd_always_on>;
		};

		hdmi1: hdmi@feae0000 {
			compatible = "renesas,hdmi1";
			reg = <0 0xfeae0000 0 0x10000>;
			interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 728>;
			power-domains = <&pd_always_on>;
		};

		du: display@feb00000 {
			compatible = "renesas,du-r8a7795";
			reg = <0 0xfeb00000 0 0x80000>,
			      <0 0xfeb90000 0 0x14>;
			reg-names = "du", "lvds.0";
			interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
				     <0 268 IRQ_TYPE_LEVEL_HIGH>,
				     <0 269 IRQ_TYPE_LEVEL_HIGH>,
				     <0 270 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>,
				 <&cpg CPG_MOD 722>,
				 <&cpg CPG_MOD 721>,
				 <&cpg CPG_MOD 727>,
				 <&cpg CPG_MOD 729>,
				 <&cpg CPG_MOD 728>,
				 <&dclkin0>, <&dclkin1>, <&dclkin2>, <&dclkin3>;
			clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0",
				      "isfr.0", "isfr.1", "dclkin.0", "dclkin.1",
				      "dclkin.2", "dclkin.3";
			power-domains = <&pd_always_on>;

			status = "disabled";

			vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;

			hdmi = <&hdmi0 &hdmi1>;
			clock-iahb = <0>;
			hdmi-num = <2>;
			hdmi-ifclk = <12500000>;

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					du_out_rgb: endpoint {
					};
				};
				port@1 {
					reg = <1>;
					du_out_hdmi0: endpoint {
					};
				};
				port@2 {
					reg = <2>;
					du_out_hdmi1: endpoint {
					};
				};
				port@3 {
					reg = <3>;
					du_out_lvds0: endpoint {
					};
				};
			};
		};

		tsc1: thermal@0xe6198000 {
			compatible = "renesas,thermal-r8a7795",
				"renesas,rcar-gen3-thermal";
			reg = <0 0xe6198000 0 0x5c>;
			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 522>;
			power-domains = <&pd_always_on>;
			#thermal-sensor-cells = <0>;
			status = "okay";
		};

		tsc2: thermal@0xe61A0000 {
			compatible = "renesas,thermal-r8a7795",
				"renesas,rcar-gen3-thermal";
			reg = <0 0xe61A0000 0 0x5c>;
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 522>;
			power-domains = <&pd_always_on>;
			#thermal-sensor-cells = <0>;
			status = "okay";
		};

		tsc3: thermal@0xe61A8000 {
			compatible = "renesas,thermal-r8a7795",
				"renesas,rcar-gen3-thermal";
			reg = <0 0xe61A8000 0 0x5c>;
			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 522>;
			power-domains = <&pd_always_on>;
			#thermal-sensor-cells = <0>;
			status = "okay";
		};

		thermal-zones {
			sensor_thermal1: sensor-thermal1 {
				polling-delay-passive = <250>;
				polling-delay = <0>;

				/* sensor ID */
				thermal-sensors = <&tsc1>;

				trips {
					sensor1_crit: sensor1-crit {
						temperature = <90000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};

			sensor_thermal2: sensor-thermal2 {
				polling-delay-passive = <250>;
				polling-delay = <0>;

				/* sensor ID */
				thermal-sensors = <&tsc2>;

				trips {
					sensor2_crit: sensor2-crit {
						temperature = <90000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};

			sensor_thermal3: sensor-thermal3 {
				polling-delay-passive = <250>;
				polling-delay = <0>;

				/* sensor ID */
				thermal-sensors = <&tsc3>;

				trips {
					sensor3_crit: sensor3-crit {
						temperature = <90000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};
			};
		};

	};
};