| From ea9b5e798773ce8ecd57d507d98f8c239155cdb5 Mon Sep 17 00:00:00 2001 |
| From: Stephen Boyd <sboyd@codeaurora.org> |
| Date: Wed, 9 Nov 2016 17:08:28 -0800 |
| Subject: [PATCH] clk: qcom: ipq806x: Fix board clk rates |
| |
| commit cbf2e548ca8ad4bb274d014e9a70bd841d29948e upstream. |
| |
| The clocks on these boards run at 25 MHz, not 19.2 and 27 like |
| other platforms. Unfortunately I copy/pasted from other similar |
| SoCs but forgot this one is different. Fix it. |
| |
| Fixes: a085f877a882 ("clk: qcom: Move cxo/pxo/xo into dt files") |
| Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c |
| index 52a7d3959875..28eb200d0f1e 100644 |
| --- a/drivers/clk/qcom/gcc-ipq806x.c |
| +++ b/drivers/clk/qcom/gcc-ipq806x.c |
| @@ -2990,11 +2990,11 @@ static int gcc_ipq806x_probe(struct platform_device *pdev) |
| struct regmap *regmap; |
| int ret; |
| |
| - ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 19200000); |
| + ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000); |
| if (ret) |
| return ret; |
| |
| - ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 27000000); |
| + ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000); |
| if (ret) |
| return ret; |
| |
| -- |
| 2.10.1 |
| |
