| From 8f7e3e6e5def85cd6c3020d636febd75397b1cb7 Mon Sep 17 00:00:00 2001 |
| From: Paul Burton <paul.burton@imgtec.com> |
| Date: Mon, 7 Nov 2016 15:07:05 +0000 |
| Subject: [PATCH] MIPS: Fix is_jump_ins() handling of 16b microMIPS |
| instructions |
| |
| commit 67c75057709a6d85c681c78b9b2f9b71191f01a2 upstream. |
| |
| is_jump_ins() checks 16b instruction fields without verifying that the |
| instruction is indeed 16b, as is done by is_ra_save_ins() & |
| is_sp_move_ins(). Add the appropriate check. |
| |
| Signed-off-by: Paul Burton <paul.burton@imgtec.com> |
| Fixes: 34c2f668d0f6 ("MIPS: microMIPS: Add unaligned access support.") |
| Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com> |
| Cc: linux-mips@linux-mips.org |
| Cc: <stable@vger.kernel.org> # v3.10+ |
| Patchwork: https://patchwork.linux-mips.org/patch/14531/ |
| Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
| Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> |
| |
| diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c |
| index a8673ec4e7f4..70973db5117d 100644 |
| --- a/arch/mips/kernel/process.c |
| +++ b/arch/mips/kernel/process.c |
| @@ -241,9 +241,14 @@ static inline int is_jump_ins(union mips_instruction *ip) |
| * |
| * microMIPS is kind of more fun... |
| */ |
| - if ((ip->mm16_r5_format.opcode == mm_pool16c_op && |
| - (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op) || |
| - ip->j_format.opcode == mm_jal32_op) |
| + if (mm_insn_16bit(ip->halfword[1])) { |
| + if ((ip->mm16_r5_format.opcode == mm_pool16c_op && |
| + (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op)) |
| + return 1; |
| + return 0; |
| + } |
| + |
| + if (ip->j_format.opcode == mm_jal32_op) |
| return 1; |
| if (ip->r_format.opcode != mm_pool32a_op || |
| ip->r_format.func != mm_pool32axf_op) |
| -- |
| 2.12.0 |
| |
