| From 9975a5f22a4fcc8d08035c65439900a983f891ad Mon Sep 17 00:00:00 2001 |
| From: Borislav Petkov <borislav.petkov@amd.com> |
| Date: Mon, 8 Mar 2010 18:29:35 +0100 |
| Subject: amd64_edac: Fix DCT base address selector |
| |
| From: Borislav Petkov <borislav.petkov@amd.com> |
| |
| commit 9975a5f22a4fcc8d08035c65439900a983f891ad upstream. |
| |
| The correct check is to verify whether in high range we're below 4GB |
| and not to extract the DctSelBaseAddr again. See "2.8.5 Routing DRAM |
| Requests" in the F10h BKDG. |
| |
| Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> |
| Acked-by: Doug Thompson <dougthompson@xmission.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
| |
| --- |
| drivers/edac/amd64_edac.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/edac/amd64_edac.c |
| +++ b/drivers/edac/amd64_edac.c |
| @@ -1430,7 +1430,7 @@ static inline u64 f10_get_base_addr_offs |
| u64 chan_off; |
| |
| if (hi_range_sel) { |
| - if (!(dct_sel_base_addr & 0xFFFFF800) && |
| + if (!(dct_sel_base_addr & 0xFFFF0000) && |
| hole_valid && (sys_addr >= 0x100000000ULL)) |
| chan_off = hole_off << 16; |
| else |
