| From ed8b0d67f33518a16c6b2450fe5ebebf180c2d04 Mon Sep 17 00:00:00 2001 |
| From: Nicolas Ferre <nicolas.ferre@atmel.com> |
| Date: Mon, 16 Apr 2012 14:46:30 +0200 |
| Subject: dmaengine: at_hdmac: remove clear-on-read in atc_dostart() |
| |
| From: Nicolas Ferre <nicolas.ferre@atmel.com> |
| |
| commit ed8b0d67f33518a16c6b2450fe5ebebf180c2d04 upstream. |
| |
| This loop on EBCISR register was designed to clear IRQ sources before enabling |
| a DMA channel. This register is clear-on-read so a race condition can appear if |
| another channel is already active and has just finished its transfer. |
| Removing this read on EBCISR is fixing the issue as there is no case where an IRQ |
| could be pending: we already make sure that this register is drained at probe() |
| time and during resume. |
| |
| Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> |
| Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/dma/at_hdmac.c | 4 ---- |
| 1 file changed, 4 deletions(-) |
| |
| --- a/drivers/dma/at_hdmac.c |
| +++ b/drivers/dma/at_hdmac.c |
| @@ -237,10 +237,6 @@ static void atc_dostart(struct at_dma_ch |
| |
| vdbg_dump_regs(atchan); |
| |
| - /* clear any pending interrupt */ |
| - while (dma_readl(atdma, EBCISR)) |
| - cpu_relax(); |
| - |
| channel_writel(atchan, SADDR, 0); |
| channel_writel(atchan, DADDR, 0); |
| channel_writel(atchan, CTRLA, 0); |
