| From stable-owner@vger.kernel.org Sat Oct 6 06:49:19 2012 |
| From: Francois Romieu <romieu@fr.zoreil.com> |
| Date: Fri, 5 Oct 2012 23:29:15 +0200 |
| Subject: r8169: fix Config2 MSIEnable bit setting. |
| To: stable@vger.kernel.org |
| |
| |
| From: franรงois romieu <romieu@fr.zoreil.com> |
| |
| commit 2ca6cf06d988fea21e812a86be79353352677c9c upstream. |
| |
| The MSIEnable bit is only available for the 8169. |
| |
| Avoid Config2 writes for the post-8169 8168 and 810x. |
| |
| Reported-by: Su Kang Yin <cantona@cantona.net> |
| Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> |
| Cc: Hayes Wang <hayeswang@realtek.com> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/net/r8169.c | 14 ++++++++------ |
| 1 file changed, 8 insertions(+), 6 deletions(-) |
| |
| --- a/drivers/net/r8169.c |
| +++ b/drivers/net/r8169.c |
| @@ -448,7 +448,6 @@ enum rtl_register_content { |
| /* Config1 register p.24 */ |
| LEDS1 = (1 << 7), |
| LEDS0 = (1 << 6), |
| - MSIEnable = (1 << 5), /* Enable Message Signaled Interrupt */ |
| Speed_down = (1 << 4), |
| MEMMAP = (1 << 3), |
| IOMAP = (1 << 2), |
| @@ -456,6 +455,7 @@ enum rtl_register_content { |
| PMEnable = (1 << 0), /* Power Management Enable */ |
| |
| /* Config2 register p. 25 */ |
| + MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */ |
| PCI_Clock_66MHz = 0x01, |
| PCI_Clock_33MHz = 0x00, |
| |
| @@ -3003,22 +3003,24 @@ static const struct rtl_cfg_info { |
| }; |
| |
| /* Cfg9346_Unlock assumed. */ |
| -static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, |
| +static unsigned rtl_try_msi(struct rtl8169_private *tp, |
| const struct rtl_cfg_info *cfg) |
| { |
| + void __iomem *ioaddr = tp->mmio_addr; |
| unsigned msi = 0; |
| u8 cfg2; |
| |
| cfg2 = RTL_R8(Config2) & ~MSIEnable; |
| if (cfg->features & RTL_FEATURE_MSI) { |
| - if (pci_enable_msi(pdev)) { |
| - dev_info(&pdev->dev, "no MSI. Back to INTx.\n"); |
| + if (pci_enable_msi(tp->pci_dev)) { |
| + netif_info(tp, hw, tp->dev, "no MSI. Back to INTx.\n"); |
| } else { |
| cfg2 |= MSIEnable; |
| msi = RTL_FEATURE_MSI; |
| } |
| } |
| - RTL_W8(Config2, cfg2); |
| + if (tp->mac_version <= RTL_GIGA_MAC_VER_06) |
| + RTL_W8(Config2, cfg2); |
| return msi; |
| } |
| |
| @@ -3588,7 +3590,7 @@ rtl8169_init_one(struct pci_dev *pdev, c |
| tp->features |= RTL_FEATURE_WOL; |
| if ((RTL_R8(Config5) & (UWF | BWF | MWF)) != 0) |
| tp->features |= RTL_FEATURE_WOL; |
| - tp->features |= rtl_try_msi(pdev, ioaddr, cfg); |
| + tp->features |= rtl_try_msi(tp, cfg); |
| RTL_W8(Cfg9346, Cfg9346_Lock); |
| |
| if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) && |
