| From 5e43e259171e1eee8bc074d9c44be434e685087b Mon Sep 17 00:00:00 2001 |
| From: Thierry Reding <treding@nvidia.com> |
| Date: Mon, 23 Mar 2015 10:57:46 +0100 |
| Subject: clk: tegra: Register the proper number of resets |
| |
| From: Thierry Reding <treding@nvidia.com> |
| |
| commit 5e43e259171e1eee8bc074d9c44be434e685087b upstream. |
| |
| The number of resets controls is 32 times the number of peripheral |
| register banks rather than 32 times the number of clocks. This reduces |
| (drastically) the number of reset controls registered from 10080 (315 |
| clocks * 32) to 224 (6 peripheral register banks * 32). |
| |
| This also fixes a potential crash because trying to use any of the |
| excess reset controls (224-10079) would have caused accesses beyond |
| the array bounds of the peripheral register banks definition array. |
| |
| Cc: Peter De Schrijver <pdeschrijver@nvidia.com> |
| Cc: Prashant Gaikwad <pgaikwad@nvidia.com> |
| Fixes: 6d5b988e7dc5 ("clk: tegra: implement a reset driver") |
| Signed-off-by: Thierry Reding <treding@nvidia.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/clk/tegra/clk.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/clk/tegra/clk.c |
| +++ b/drivers/clk/tegra/clk.c |
| @@ -272,7 +272,7 @@ void __init tegra_add_of_provider(struct |
| of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); |
| |
| rst_ctlr.of_node = np; |
| - rst_ctlr.nr_resets = clk_num * 32; |
| + rst_ctlr.nr_resets = periph_banks * 32; |
| reset_controller_register(&rst_ctlr); |
| } |
| |