| From 85a0e7539781dad4bfcffd98e72fa9f130f4e40d Mon Sep 17 00:00:00 2001 |
| From: Ondrej Zary <linux@rainbow-software.org> |
| Date: Tue, 8 Jun 2010 00:32:49 +0200 |
| Subject: PM / x86: Save/restore MISC_ENABLE register |
| |
| From: Ondrej Zary <linux@rainbow-software.org> |
| |
| commit 85a0e7539781dad4bfcffd98e72fa9f130f4e40d upstream. |
| |
| Save/restore MISC_ENABLE register on suspend/resume. |
| This fixes OOPS (invalid opcode) on resume from STR on Asus P4P800-VM, |
| which wakes up with MWAIT disabled. |
| |
| Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15385 |
| |
| Signed-off-by: Ondrej Zary <linux@rainbow-software.org> |
| Tested-by: Alan Stern <stern@rowland.harvard.edu> |
| Acked-by: H. Peter Anvin <hpa@linux.intel.com> |
| Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
| |
| --- |
| arch/x86/include/asm/suspend_32.h | 2 ++ |
| arch/x86/include/asm/suspend_64.h | 2 ++ |
| arch/x86/power/cpu.c | 4 ++++ |
| 3 files changed, 8 insertions(+) |
| |
| --- a/arch/x86/include/asm/suspend_32.h |
| +++ b/arch/x86/include/asm/suspend_32.h |
| @@ -15,6 +15,8 @@ static inline int arch_prepare_suspend(v |
| struct saved_context { |
| u16 es, fs, gs, ss; |
| unsigned long cr0, cr2, cr3, cr4; |
| + u64 misc_enable; |
| + bool misc_enable_saved; |
| struct desc_ptr gdt; |
| struct desc_ptr idt; |
| u16 ldt; |
| --- a/arch/x86/include/asm/suspend_64.h |
| +++ b/arch/x86/include/asm/suspend_64.h |
| @@ -27,6 +27,8 @@ struct saved_context { |
| u16 ds, es, fs, gs, ss; |
| unsigned long gs_base, gs_kernel_base, fs_base; |
| unsigned long cr0, cr2, cr3, cr4, cr8; |
| + u64 misc_enable; |
| + bool misc_enable_saved; |
| unsigned long efer; |
| u16 gdt_pad; |
| u16 gdt_limit; |
| --- a/arch/x86/power/cpu.c |
| +++ b/arch/x86/power/cpu.c |
| @@ -105,6 +105,8 @@ static void __save_processor_state(struc |
| ctxt->cr4 = read_cr4(); |
| ctxt->cr8 = read_cr8(); |
| #endif |
| + ctxt->misc_enable_saved = !rdmsrl_safe(MSR_IA32_MISC_ENABLE, |
| + &ctxt->misc_enable); |
| } |
| |
| /* Needed by apm.c */ |
| @@ -152,6 +154,8 @@ static void fix_processor_context(void) |
| */ |
| static void __restore_processor_state(struct saved_context *ctxt) |
| { |
| + if (ctxt->misc_enable_saved) |
| + wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); |
| /* |
| * control registers |
| */ |
