| From: Anssi Hannula <anssi.hannula@bitwise.fi> |
| Date: Mon, 26 Feb 2018 14:27:13 +0200 |
| Subject: can: xilinx_can: fix RX overflow interrupt not being enabled |
| |
| commit 83997997252f5d3fc7f04abc24a89600c2b504ab upstream. |
| |
| RX overflow interrupt (RXOFLW) is disabled even though xcan_interrupt() |
| processes it. This means that an RX overflow interrupt will only be |
| processed when another interrupt gets asserted (e.g. for RX/TX). |
| |
| Fix that by enabling the RXOFLW interrupt. |
| |
| Fixes: b1201e44f50b ("can: xilinx CAN controller support") |
| Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi> |
| Cc: Michal Simek <michal.simek@xilinx.com> |
| Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| --- |
| drivers/net/can/xilinx_can.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/net/can/xilinx_can.c |
| +++ b/drivers/net/can/xilinx_can.c |
| @@ -103,7 +103,7 @@ enum xcan_reg { |
| #define XCAN_INTR_ALL (XCAN_IXR_TXOK_MASK | XCAN_IXR_BSOFF_MASK |\ |
| XCAN_IXR_WKUP_MASK | XCAN_IXR_SLP_MASK | \ |
| XCAN_IXR_RXNEMP_MASK | XCAN_IXR_ERROR_MASK | \ |
| - XCAN_IXR_ARBLST_MASK) |
| + XCAN_IXR_RXOFLW_MASK | XCAN_IXR_ARBLST_MASK) |
| |
| /* CAN register bit shift - XCAN_<REG>_<BIT>_SHIFT */ |
| #define XCAN_BTR_SJW_SHIFT 7 /* Synchronous jump width */ |
