| From: Huacai Chen <chenhc@lemote.com> |
| Date: Tue, 12 Jun 2018 17:54:42 +0800 |
| Subject: MIPS: io: Add barrier after register read in inX() |
| |
| commit 18f3e95b90b28318ef35910d21c39908de672331 upstream. |
| |
| While a barrier is present in the outX() functions before the register |
| write, a similar barrier is missing in the inX() functions after the |
| register read. This could allow memory accesses following inX() to |
| observe stale data. |
| |
| This patch is very similar to commit a1cc7034e33d12dc1 ("MIPS: io: Add |
| barrier after register read in readX()"). Because war_io_reorder_wmb() |
| is both used by writeX() and outX(), if readX() need a barrier then so |
| does inX(). |
| |
| Signed-off-by: Huacai Chen <chenhc@lemote.com> |
| Patchwork: https://patchwork.linux-mips.org/patch/19516/ |
| Signed-off-by: Paul Burton <paul.burton@mips.com> |
| Cc: James Hogan <james.hogan@mips.com> |
| Cc: linux-mips@linux-mips.org |
| Cc: Fuxin Zhang <zhangfx@lemote.com> |
| Cc: Zhangjin Wu <wuzhangjin@gmail.com> |
| Cc: Huacai Chen <chenhuacai@gmail.com> |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| --- |
| arch/mips/include/asm/io.h | 2 ++ |
| 1 file changed, 2 insertions(+) |
| |
| --- a/arch/mips/include/asm/io.h |
| +++ b/arch/mips/include/asm/io.h |
| @@ -410,6 +410,8 @@ static inline type pfx##in##bwlq##p(unsi |
| __val = *__addr; \ |
| slow; \ |
| \ |
| + /* prevent prefetching of coherent DMA data prematurely */ \ |
| + rmb(); \ |
| return pfx##ioswab##bwlq(__addr, __val); \ |
| } |
| |