| From: Ben Hutchings <ben@decadent.org.uk> |
| Date: Wed, 07 Nov 2018 17:09:42 +0000 |
| Subject: x86/cpufeatures: Hide AMD-specific speculation flags |
| |
| Hide the AMD_{IBRS,IBPB,STIBP} flag from /proc/cpuinfo. This was done |
| upstream as part of commit e7c587da1252 "x86/speculation: Use |
| synthetic bits for IBRS/IBPB/STIBP". I already backported that commit |
| but accidentally dropped this part. |
| |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| --- |
| --- a/arch/x86/include/asm/cpufeature.h |
| +++ b/arch/x86/include/asm/cpufeature.h |
| @@ -253,9 +253,9 @@ |
| #define X86_FEATURE_SPEC_CTRL_SSBD (10*32+31) /* "" Speculative Store Bypass Disable */ |
| |
| /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 11 */ |
| -#define X86_FEATURE_AMD_IBPB (11*32+12) /* Indirect Branch Prediction Barrier */ |
| -#define X86_FEATURE_AMD_IBRS (11*32+14) /* Indirect Branch Restricted Speculation */ |
| -#define X86_FEATURE_AMD_STIBP (11*32+15) /* Single Thread Indirect Branch Predictors */ |
| +#define X86_FEATURE_AMD_IBPB (11*32+12) /* "" Indirect Branch Prediction Barrier */ |
| +#define X86_FEATURE_AMD_IBRS (11*32+14) /* "" Indirect Branch Restricted Speculation */ |
| +#define X86_FEATURE_AMD_STIBP (11*32+15) /* "" Single Thread Indirect Branch Predictors */ |
| #define X86_FEATURE_VIRT_SSBD (11*32+25) /* Virtualized Speculative Store Bypass Disable */ |
| |
| /* |
