| From: Jerome Brunet <jbrunet@baylibre.com> |
| Date: Wed, 14 Feb 2018 14:43:38 +0100 |
| Subject: clk: fix mux clock documentation |
| |
| commit fe3f338f0cb2ed4d4f06da054c21ae2f8a36ef2d upstream. |
| |
| The mux documentation mentions the non-existing parameter width instead |
| of mask, so just sed this. |
| |
| The table field is missing in the documentation of clk_mux. |
| Add a small blurb explaining what it is |
| |
| Fixes: 9d9f78ed9af0 ("clk: basic clock hardware types") |
| Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
| Signed-off-by: Michael Turquette <mturquette@baylibre.com> |
| Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| --- |
| include/linux/clk-provider.h | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| --- a/include/linux/clk-provider.h |
| +++ b/include/linux/clk-provider.h |
| @@ -356,8 +356,9 @@ struct clk *clk_register_divider_table(s |
| * |
| * @hw: handle between common and hardware-specific interfaces |
| * @reg: register controlling multiplexer |
| + * @table: array of register values corresponding to the parent index |
| * @shift: shift to multiplexer bit field |
| - * @width: width of mutliplexer bit field |
| + * @mask: mask of mutliplexer bit field |
| * @flags: hardware-specific flags |
| * @lock: register lock |
| * |
