| From: "Maciej W. Rozycki" <macro@mips.com> |
| Date: Mon, 14 May 2018 16:49:43 +0100 |
| Subject: MIPS: Fix ptrace(2) PTRACE_PEEKUSR and PTRACE_POKEUSR accesses to o32 |
| FGRs |
| |
| commit 9a3a92ccfe3620743d4ae57c987dc8e9c5f88996 upstream. |
| |
| Check the TIF_32BIT_FPREGS task setting of the tracee rather than the |
| tracer in determining the layout of floating-point general registers in |
| the floating-point context, correcting access to odd-numbered registers |
| for o32 tracees where the setting disagrees between the two processes. |
| |
| Fixes: 597ce1723e0f ("MIPS: Support for 64-bit FP with O32 binaries") |
| Signed-off-by: Maciej W. Rozycki <macro@mips.com> |
| Cc: Ralf Baechle <ralf@linux-mips.org> |
| Cc: linux-mips@linux-mips.org |
| Signed-off-by: James Hogan <jhogan@kernel.org> |
| Signed-off-by: Ben Hutchings <ben@decadent.org.uk> |
| --- |
| arch/mips/kernel/ptrace.c | 4 ++-- |
| arch/mips/kernel/ptrace32.c | 4 ++-- |
| 2 files changed, 4 insertions(+), 4 deletions(-) |
| |
| --- a/arch/mips/kernel/ptrace.c |
| +++ b/arch/mips/kernel/ptrace.c |
| @@ -741,7 +741,7 @@ long arch_ptrace(struct task_struct *chi |
| fregs = get_fpu_regs(child); |
| |
| #ifdef CONFIG_32BIT |
| - if (test_thread_flag(TIF_32BIT_FPREGS)) { |
| + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| /* |
| * The odd registers are actually the high |
| * order bits of the values stored in the even |
| @@ -830,7 +830,7 @@ long arch_ptrace(struct task_struct *chi |
| |
| init_fp_ctx(child); |
| #ifdef CONFIG_32BIT |
| - if (test_thread_flag(TIF_32BIT_FPREGS)) { |
| + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| /* |
| * The odd registers are actually the high |
| * order bits of the values stored in the even |
| --- a/arch/mips/kernel/ptrace32.c |
| +++ b/arch/mips/kernel/ptrace32.c |
| @@ -97,7 +97,7 @@ long compat_arch_ptrace(struct task_stru |
| break; |
| } |
| fregs = get_fpu_regs(child); |
| - if (test_thread_flag(TIF_32BIT_FPREGS)) { |
| + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| /* |
| * The odd registers are actually the high |
| * order bits of the values stored in the even |
| @@ -203,7 +203,7 @@ long compat_arch_ptrace(struct task_stru |
| sizeof(child->thread.fpu)); |
| child->thread.fpu.fcr31 = 0; |
| } |
| - if (test_thread_flag(TIF_32BIT_FPREGS)) { |
| + if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { |
| /* |
| * The odd registers are actually the high |
| * order bits of the values stored in the even |