| /* SPDX-License-Identifier: GPL-2.0-only */ | |
| /* | |
| * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved. | |
| */ | |
| #ifndef _DT_BINDINGS_SOC_TEGRA_PMC_H | |
| #define _DT_BINDINGS_SOC_TEGRA_PMC_H | |
| #define TEGRA_PMC_CLK_OUT_1 0 | |
| #define TEGRA_PMC_CLK_OUT_2 1 | |
| #define TEGRA_PMC_CLK_OUT_3 2 | |
| #define TEGRA_PMC_CLK_BLINK 3 | |
| #define TEGRA_PMC_CLK_MAX 4 | |
| #endif /* _DT_BINDINGS_SOC_TEGRA_PMC_H */ |