blob: 3b5ba5af83e05a94e77bf6cb5577490e0ac25dcc [file] [log] [blame]
From a0ef51f4b57f8a01b252ac767519d2a4002d2a4c Mon Sep 17 00:00:00 2001
From: Marc Zyngier <marc.zyngier@arm.com>
Date: Tue, 6 Sep 2011 09:56:17 +0100
Subject: ARM: GIC: Add global gic_handle_irq() function
Provide the GIC code with a low level handler that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 562e0027d21bf64838178e2f5157df3d5833972e)
Conflicts:
arch/arm/common/gic.c
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/common/gic.c | 27 ++++++++++++++++++++++++++-
arch/arm/include/asm/hardware/gic.h | 1 +
2 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 95ad8d1..7a73799 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/smp.h>
-#include <linux/cpu_pm.h>
#include <linux/cpumask.h>
#include <linux/io.h>
#include <linux/interrupt.h>
@@ -211,6 +210,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on)
#define gic_set_wake NULL
#endif
+asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
+{
+ u32 irqstat, irqnr;
+ struct gic_chip_data *gic = &gic_data[0];
+ void __iomem *cpu_base = gic->cpu_base;
+
+ do {
+ irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK);
+ irqnr = irqstat & ~0x1c00;
+
+ if (likely(irqnr > 15 && irqnr < 1021)) {
+ //irqnr = irqnr + gic->irq_offset;
+ handle_IRQ(irqnr, regs);
+ continue;
+ }
+ if (irqnr < 16) {
+ writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
+#ifdef CONFIG_SMP
+ handle_IPI(irqnr, regs);
+#endif
+ continue;
+ }
+ break;
+ } while (1);
+}
+
static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
{
struct gic_chip_data *chip_data = irq_get_handler_data(irq);
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index c562705..615c336 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -38,6 +38,7 @@ extern struct irq_chip gic_arch_extn;
void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
void gic_secondary_init(unsigned int);
+void gic_handle_irq(struct pt_regs *regs);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
void gic_enable_ppi(unsigned int);
--
1.7.10.2.565.gbd578b5