| From 855b6dfcdf43e601150eaf387ff3d781ab026c6d Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Mon, 19 Sep 2016 16:18:56 +0200 |
| Subject: [PATCH 216/299] ARM: dts: r8a7794: Correct SCIFB reg properties to |
| cover all registers |
| |
| Several SCIFB registers reside outside the reported register ranges. |
| Fortunately this works (on Linux), due to the PAGE_SIZE granularity of |
| ioremap(). |
| |
| Extend the sizes from 64 to 0x100 bytes to fix this, like is done on |
| SH/R-Mobile SoCs. |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 655ea555064251e0b094848d378d4a67e8ebb0ed) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7794.dtsi | 6 +++--- |
| 1 file changed, 3 insertions(+), 3 deletions(-) |
| |
| --- a/arch/arm/boot/dts/r8a7794.dtsi |
| +++ b/arch/arm/boot/dts/r8a7794.dtsi |
| @@ -410,7 +410,7 @@ |
| scifb0: serial@e6c20000 { |
| compatible = "renesas,scifb-r8a7794", |
| "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| - reg = <0 0xe6c20000 0 64>; |
| + reg = <0 0xe6c20000 0 0x100>; |
| interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>; |
| clock-names = "fck"; |
| @@ -424,7 +424,7 @@ |
| scifb1: serial@e6c30000 { |
| compatible = "renesas,scifb-r8a7794", |
| "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| - reg = <0 0xe6c30000 0 64>; |
| + reg = <0 0xe6c30000 0 0x100>; |
| interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>; |
| clock-names = "fck"; |
| @@ -438,7 +438,7 @@ |
| scifb2: serial@e6ce0000 { |
| compatible = "renesas,scifb-r8a7794", |
| "renesas,rcar-gen2-scifb", "renesas,scifb"; |
| - reg = <0 0xe6ce0000 0 64>; |
| + reg = <0 0xe6ce0000 0 0x100>; |
| interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>; |
| clock-names = "fck"; |
