| From f0c3c1e42582f88b5830c23a0bb65ebbc9094697 Mon Sep 17 00:00:00 2001 |
| From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Date: Mon, 31 Oct 2016 22:54:50 +0300 |
| Subject: [PATCH 247/299] ARM: dts: r8a7743: add SYS-DMAC support |
| |
| Describe SYS-DMAC0/1 in the R8A7743 device tree. |
| |
| Based on the original (and large) patch by Dmitry Shifrin |
| <dmitry.shifrin@cogentembedded.com>. |
| |
| Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit 6ed5ed500a5c67eed7b76e5353f7bca3b3daae92) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7743.dtsi | 64 +++++++++++++++++++++++++++++++++++++++++ |
| 1 file changed, 64 insertions(+) |
| |
| --- a/arch/arm/boot/dts/r8a7743.dtsi |
| +++ b/arch/arm/boot/dts/r8a7743.dtsi |
| @@ -93,6 +93,70 @@ |
| compatible = "renesas,r8a7743-rst"; |
| reg = <0 0xe6160000 0 0x100>; |
| }; |
| + |
| + dmac0: dma-controller@e6700000 { |
| + compatible = "renesas,dmac-r8a7743", |
| + "renesas,rcar-dmac"; |
| + reg = <0 0xe6700000 0 0x20000>; |
| + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-names = "error", |
| + "ch0", "ch1", "ch2", "ch3", |
| + "ch4", "ch5", "ch6", "ch7", |
| + "ch8", "ch9", "ch10", "ch11", |
| + "ch12", "ch13", "ch14"; |
| + clocks = <&cpg CPG_MOD 219>; |
| + clock-names = "fck"; |
| + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
| + #dma-cells = <1>; |
| + dma-channels = <15>; |
| + }; |
| + |
| + dmac1: dma-controller@e6720000 { |
| + compatible = "renesas,dmac-r8a7743", |
| + "renesas,rcar-dmac"; |
| + reg = <0 0xe6720000 0 0x20000>; |
| + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH |
| + GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; |
| + interrupt-names = "error", |
| + "ch0", "ch1", "ch2", "ch3", |
| + "ch4", "ch5", "ch6", "ch7", |
| + "ch8", "ch9", "ch10", "ch11", |
| + "ch12", "ch13", "ch14"; |
| + clocks = <&cpg CPG_MOD 218>; |
| + clock-names = "fck"; |
| + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; |
| + #dma-cells = <1>; |
| + dma-channels = <15>; |
| + }; |
| }; |
| |
| /* External root clock */ |
