| From 4f53e25aca63ba026bfdfeff70bdedadbd8a2d65 Mon Sep 17 00:00:00 2001 |
| From: Chris Brandt <chris.brandt@renesas.com> |
| Date: Mon, 23 Jan 2017 08:55:18 -0500 |
| Subject: [PATCH 015/255] ARM: dts: r7s72100: add ostm clock to device tree |
| |
| Signed-off-by: Chris Brandt <chris.brandt@renesas.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| (cherry picked from commit cfddd3db08f619bf0c1764b3103caedb6793bc48) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r7s72100.dtsi | 9 +++++++++ |
| include/dt-bindings/clock/r7s72100-clock.h | 4 ++++ |
| 2 files changed, 13 insertions(+) |
| |
| --- a/arch/arm/boot/dts/r7s72100.dtsi |
| +++ b/arch/arm/boot/dts/r7s72100.dtsi |
| @@ -108,6 +108,15 @@ |
| clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7"; |
| }; |
| |
| + mstp5_clks: mstp5_clks@fcfe0428 { |
| + #clock-cells = <1>; |
| + compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| + reg = <0xfcfe0428 4>; |
| + clocks = <&p0_clk>, <&p0_clk>; |
| + clock-indices = <R7S72100_CLK_OSTM0 R7S72100_CLK_OSTM1>; |
| + clock-output-names = "ostm0", "ostm1"; |
| + }; |
| + |
| mstp7_clks: mstp7_clks@fcfe0430 { |
| #clock-cells = <1>; |
| compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| --- a/include/dt-bindings/clock/r7s72100-clock.h |
| +++ b/include/dt-bindings/clock/r7s72100-clock.h |
| @@ -25,6 +25,10 @@ |
| #define R7S72100_CLK_SCIF6 1 |
| #define R7S72100_CLK_SCIF7 0 |
| |
| +/* MSTP5 */ |
| +#define R7S72100_CLK_OSTM0 1 |
| +#define R7S72100_CLK_OSTM1 0 |
| + |
| /* MSTP7 */ |
| #define R7S72100_CLK_ETHER 4 |
| |
