blob: 2efafad0f9f9d3d83795374a0fa3c889e72bac1a [file] [log] [blame]
From 81049c91bb75c2f2d4be7d4795e9d2e17a4e37d3 Mon Sep 17 00:00:00 2001
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Thu, 3 May 2018 22:37:52 +0300
Subject: [PATCH 1430/1795] PCI: rcar: Remove PHYRDY polling from
rcar_pcie_hw_init_h1()
Since rcar_pcie_hw_init() is polling PCIEPHYSR.PHYRDY there is no need
anymore for polling the PHY specific register in rcar_pcie_hw_init_h1().
Remove it.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit bd7b6d147a14c308a0227852334e01723451c73c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pci/host/pcie-rcar.c | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 93f83fb65940..d8a2849a941f 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -106,7 +106,6 @@
#define LANE_POS 8
#define ADR_POS 0
#define H1_PCIEPHYDOUTR 0x040014
-#define H1_PCIEPHYSR 0x040018
/* R-Car Gen2 PHY */
#define GEN2_PCIEPHYADDR 0x780
@@ -630,8 +629,6 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
{
- unsigned int timeout = 10;
-
/* Initialize the phy */
phy_write_reg(pcie, 0, 0x42, 0x1, 0x0EC34191);
phy_write_reg(pcie, 1, 0x42, 0x1, 0x0EC34180);
@@ -650,14 +647,7 @@ static int rcar_pcie_hw_init_h1(struct rcar_pcie *pcie)
phy_write_reg(pcie, 0, 0x64, 0x1, 0x3F0F1F0F);
phy_write_reg(pcie, 0, 0x66, 0x1, 0x00008000);
- while (timeout--) {
- if (rcar_pci_read_reg(pcie, H1_PCIEPHYSR))
- return rcar_pcie_hw_init(pcie);
-
- msleep(5);
- }
-
- return -ETIMEDOUT;
+ return rcar_pcie_hw_init(pcie);
}
static int rcar_pcie_hw_init_gen2(struct rcar_pcie *pcie)
--
2.19.0