blob: cdafc4ed15b277a885065f4652684e283ec6f785 [file] [log] [blame]
From 655e990e68b3d3eb87704816e56329240c5820eb Mon Sep 17 00:00:00 2001
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Date: Tue, 27 Feb 2018 11:22:47 +0100
Subject: [PATCH 1017/1795] arm64: dts: renesas: draak: Override EtherAVB
phy-mode
As the PHY interface installed on the Draak board, provides TX
channel delay, make the "phy-mode" property a board-specific one, meant
to override the one specified in the SoC DTSI.
Follow up patches will reset the r8a77995 SoC DTSI to use "rgmii" mode
and let the board file override that.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit 9c63dcd4df91687a8378d0af1c25429c5ef23a82)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index 34c7f58417ba..d03f19414028 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -189,6 +189,7 @@
pinctrl-names = "default";
renesas,no-ether-link;
phy-handle = <&phy0>;
+ phy-mode = "rgmii-txid";
status = "okay";
phy0: ethernet-phy@0 {
--
2.19.0