| From de6a3a7331d02680b3f5a79d1181b720afc5545e Mon Sep 17 00:00:00 2001 |
| From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= |
| <niklas.soderlund+renesas@ragnatech.se> |
| Date: Tue, 3 Jul 2018 17:18:42 +0200 |
| Subject: [PATCH 1579/1795] pinctrl: sh-pfc: r8a77970: remove |
| SH_PFC_PIN_CFG_DRIVE_STRENGTH flag |
| MIME-Version: 1.0 |
| Content-Type: text/plain; charset=UTF-8 |
| Content-Transfer-Encoding: 8bit |
| |
| The datasheet does not document any registers to control drive strength, |
| and no drive strength registers are for this reason described for this |
| SoC. The flags indicating that drive strength can be controlled are |
| however set for some pins in the driver. |
| |
| This leads to a NULL pointer dereference when the sh-pfc core tries to |
| access the struct describing the drive strength registers, for example |
| when reading the sysfs file pinconf-pins. |
| |
| Fix this by removing the SH_PFC_PIN_CFG_DRIVE_STRENGTH from all pins. |
| |
| Fixes: b92ac66a1819602b ("pinctrl: sh-pfc: Add R8A77970 PFC support") |
| Signed-off-by: Niklas Sรถderlund <niklas.soderlund+renesas@ragnatech.se> |
| Reviewed-by: Simon Horman <horms+renesas@verge.net.au> |
| Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
| (cherry picked from commit 550b6f7e8cf93fc2753aa01e655ed5471012ab5a) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| --- |
| drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 14 ++++++-------- |
| 1 file changed, 6 insertions(+), 8 deletions(-) |
| |
| diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c |
| index b02caf316711..eeb58b3bbc9a 100644 |
| --- a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c |
| +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c |
| @@ -21,15 +21,13 @@ |
| #include "core.h" |
| #include "sh_pfc.h" |
| |
| -#define CFG_FLAGS SH_PFC_PIN_CFG_DRIVE_STRENGTH |
| - |
| #define CPU_ALL_PORT(fn, sfx) \ |
| - PORT_GP_CFG_22(0, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| - PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \ |
| - PORT_GP_CFG_17(2, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| - PORT_GP_CFG_17(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| - PORT_GP_CFG_6(4, fn, sfx, CFG_FLAGS), \ |
| - PORT_GP_CFG_15(5, fn, sfx, CFG_FLAGS) |
| + PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| + PORT_GP_28(1, fn, sfx), \ |
| + PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| + PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
| + PORT_GP_6(4, fn, sfx), \ |
| + PORT_GP_15(5, fn, sfx) |
| /* |
| * F_() : just information |
| * FM() : macro for FN_xxx / xxx_MARK |
| -- |
| 2.19.0 |
| |
