patches.gma500/0046-drm-gma500-cdv-Add-and-hook-up-chip-op-for-watermark.patch

From 1a3369d3d2729108c26a1b3c9d340dcd580b0fbb Mon Sep 17 00:00:00 2001
From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Date: Wed, 14 Aug 2013 19:14:17 +0200
Subject: drm/gma500/cdv: Add and hook up chip op for watermarks

Add a callback hook to the chip ops struct to allow chips to have their
specific fifo watermark update function. Currently only cdv actually
tries to set wms based on crtc configuration but if/when the other chips
needs it we can attach a callback for them as well.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
(cherry picked from commit 28a8194c12f8c8bb46aecd4cb1f36bac716714c4)
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
---
 drivers/gpu/drm/gma500/cdv_device.c        |    1 +
 drivers/gpu/drm/gma500/cdv_device.h        |    1 +
 drivers/gpu/drm/gma500/cdv_intel_display.c |    2 +-
 drivers/gpu/drm/gma500/gma_display.c       |    2 +-
 drivers/gpu/drm/gma500/gma_display.h       |    2 --
 drivers/gpu/drm/gma500/psb_drv.h           |    1 +
 6 files changed, 5 insertions(+), 4 deletions(-)

--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -657,4 +657,5 @@ const struct psb_ops cdv_chip_ops = {
 	.restore_regs = cdv_restore_display_registers,
 	.power_down = cdv_power_down,
 	.power_up = cdv_power_up,
+	.update_wm = cdv_update_wm,
 };
--- a/drivers/gpu/drm/gma500/cdv_device.h
+++ b/drivers/gpu/drm/gma500/cdv_device.h
@@ -26,3 +26,4 @@ extern void cdv_hdmi_init(struct drm_dev
 			int reg);
 extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
 					     struct drm_crtc *crtc);
+extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc);
--- a/drivers/gpu/drm/gma500/cdv_intel_display.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
@@ -532,7 +532,7 @@ void cdv_intel_disable_self_refresh(stru
 
 }
 
-void cdv_intel_update_watermark(struct drm_device *dev, struct drm_crtc *crtc)
+void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc)
 {
 
 	if (cdv_intel_single_pipe_active(dev)) {
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -321,7 +321,7 @@ void gma_crtc_dpms(struct drm_crtc *crtc
 	}
 
 	if (IS_CDV(dev))
-		cdv_intel_update_watermark(dev, crtc);
+		dev_priv->ops->update_wm(dev, crtc);
 
 	/* Set FIFO watermarks */
 	REG_WRITE(DSPARB, 0x3F3E);
--- a/drivers/gpu/drm/gma500/gma_display.h
+++ b/drivers/gpu/drm/gma500/gma_display.h
@@ -103,6 +103,4 @@ extern bool gma_find_best_pll(const stru
 
 /* Cedarview specific functions */
 extern void cdv_intel_disable_self_refresh(struct drm_device *dev);
-extern void cdv_intel_update_watermark(struct drm_device *dev,
-				       struct drm_crtc *crtc);
 #endif
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -700,6 +700,7 @@ struct psb_ops {
 	int (*restore_regs)(struct drm_device *dev);
 	int (*power_up)(struct drm_device *dev);
 	int (*power_down)(struct drm_device *dev);
+	void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc);
 
 	void (*lvds_bl_power)(struct drm_device *dev, bool on);
 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE