| From 5bf18a6e06c0906459605ebb45077d8ab710ebde Mon Sep 17 00:00:00 2001 |
| From: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| Date: Mon, 13 May 2013 10:46:38 -0700 |
| Subject: arm: dts: zynq: Merge zynq-zc702.dts with Xilinx repository |
| |
| This patch updates the zynq zc702 device tree by merging some parts |
| from the corresponding file in the Xilinx repository |
| (commit efc27505715e64526653f35274717c0fc56491e3 in master branch) |
| |
| Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp> |
| Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp> |
| --- |
| arch/arm/boot/dts/zynq-zc702.dts | 389 ++++++++++++++++++++++++++++++++++++--- |
| 1 file changed, 366 insertions(+), 23 deletions(-) |
| |
| --- a/arch/arm/boot/dts/zynq-zc702.dts |
| +++ b/arch/arm/boot/dts/zynq-zc702.dts |
| @@ -1,34 +1,377 @@ |
| /* |
| - * Copyright (C) 2011 Xilinx |
| - * Copyright (C) 2012 National Instruments Corp. |
| + * Device Tree Generator version: 1.1 |
| * |
| - * This software is licensed under the terms of the GNU General Public |
| - * License version 2, as published by the Free Software Foundation, and |
| - * may be copied, distributed, and modified under those terms. |
| + * (C) Copyright 2007-2013 Xilinx, Inc. |
| + * (C) Copyright 2007-2013 Michal Simek |
| + * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd |
| + * |
| + * Michal SIMEK <monstr@monstr.eu> |
| + * |
| + * CAUTION: This file is automatically generated by libgen. |
| + * Version: Xilinx EDK 14.5 EDK_P.58f |
| * |
| - * This program is distributed in the hope that it will be useful, |
| - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| - * GNU General Public License for more details. |
| */ |
| -/dts-v1/; |
| -/include/ "zynq-7000.dtsi" |
| |
| +/dts-v1/; |
| / { |
| - model = "Zynq ZC702 Development Board"; |
| - compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; |
| - |
| - memory { |
| + #address-cells = <1>; |
| + #size-cells = <1>; |
| + compatible = "xlnx,zynq-7000"; |
| + model = "Xilinx Zynq"; |
| + aliases { |
| + ethernet0 = &ps7_ethernet_0; |
| + i2c0 = &ps7_i2c_0; |
| + serial0 = &ps7_uart_1; |
| + spi0 = &ps7_qspi_0; |
| + } ; |
| + chosen { |
| + bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 initrd=0x2000000,8M rw rootwait earlyprintk"; |
| + linux,stdout-path = "/amba@0/serial@e0001000"; |
| + } ; |
| + cpus { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + ps7_cortexa9_0: cpu@0 { |
| + bus-handle = <&ps7_axi_interconnect_0>; |
| + compatible = "arm,cortex-a9"; |
| + d-cache-line-size = <0x20>; |
| + d-cache-size = <0x8000>; |
| + device_type = "cpu"; |
| + i-cache-line-size = <0x20>; |
| + i-cache-size = <0x8000>; |
| + interrupt-handle = <&ps7_scugic_0>; |
| + reg = <0x0>; |
| + } ; |
| + ps7_cortexa9_1: cpu@1 { |
| + bus-handle = <&ps7_axi_interconnect_0>; |
| + compatible = "arm,cortex-a9"; |
| + d-cache-line-size = <0x20>; |
| + d-cache-size = <0x8000>; |
| + device_type = "cpu"; |
| + i-cache-line-size = <0x20>; |
| + i-cache-size = <0x8000>; |
| + interrupt-handle = <&ps7_scugic_0>; |
| + reg = <0x1>; |
| + } ; |
| + } ; |
| + pmu { |
| + compatible = "arm,cortex-a9-pmu"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 5 4>, <0 6 4>; |
| + reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>; |
| + reg-names = "cpu0", "cpu1"; |
| + } ; |
| + ps7_ddr_0: memory@0 { |
| device_type = "memory"; |
| reg = <0x0 0x40000000>; |
| - }; |
| + } ; |
| + ps7_axi_interconnect_0: amba@0 { |
| + #address-cells = <1>; |
| + #size-cells = <1>; |
| + compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus"; |
| + ranges ; |
| + ps7_dma_s: ps7-dma@f8003000 { |
| + #dma-cells = <1>; |
| + #dma-channels = <8>; |
| + #dma-requests = <4>; |
| + arm,primecell-periphid = <0x41330>; |
| + clock-names = "apb_pclk"; |
| + clocks = <&clkc 27>; |
| + compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330"; |
| + interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", |
| + "dma4", "dma5", "dma6", "dma7"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>; |
| + reg = <0xf8003000 0x1000>; |
| + } ; |
| + ps7_ethernet_0: ps7-ethernet@e000b000 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + clock-names = "ref_clk", "aper_clk"; |
| + clocks = <&clkc 13>, <&clkc 30>; |
| + compatible = "xlnx,ps7-ethernet-1.00.a"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 22 4>; |
| + local-mac-address = [00 0a 35 00 00 00]; |
| + phy-handle = <&phy0>; |
| + phy-mode = "rgmii-id"; |
| + reg = <0xe000b000 0x1000>; |
| + xlnx,enet-reset = "MIO 11"; |
| + xlnx,eth-mode = <0x1>; |
| + xlnx,has-mdio = <0x1>; |
| + xlnx,ptp-enet-clock = <111111115>; |
| + mdio { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + phy0: phy@7 { |
| + compatible = "marvell,88e1116r"; |
| + device_type = "ethernet-phy"; |
| + reg = <7>; |
| + } ; |
| + } ; |
| + } ; |
| + ps7_gpio_0: ps7-gpio@e000a000 { |
| + #gpio-cells = <2>; |
| + clocks = <&clkc 42>; |
| + compatible = "xlnx,ps7-gpio-1.00.a"; |
| + emio-gpio-width = <64>; |
| + gpio-controller ; |
| + gpio-mask-high = <0x0>; |
| + gpio-mask-low = <0x5600>; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 20 4>; |
| + reg = <0xe000a000 0x1000>; |
| + } ; |
| + ps7_i2c_0: ps7-i2c@e0004000 { |
| + bus-id = <0>; |
| + clocks = <&clkc 38>; |
| + compatible = "xlnx,ps7-i2c-1.00.a"; |
| + i2c-clk = <400000>; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 25 4>; |
| + reg = <0xe0004000 0x1000>; |
| + xlnx,has-interrupt = <0x0>; |
| + xlnx,i2c-reset = "MIO 13"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + i2cswitch@74 { |
| + compatible = "nxp,pca9548"; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0x74>; |
| |
| - chosen { |
| - bootargs = "console=ttyPS0,115200 earlyprintk"; |
| - }; |
| + i2c@0 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <0>; |
| + osc@5d { |
| + compatible = "si570"; |
| + reg = <0x5d>; |
| + factory-fout = <156250000>; |
| + initial-fout = <148500000>; |
| + }; |
| + }; |
| + |
| + i2c@2 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <2>; |
| + eeprom@54 { |
| + compatible = "at,24c08"; |
| + reg = <0x54>; |
| + }; |
| + }; |
| + |
| + i2c@3 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <3>; |
| + gpio@21 { |
| + compatible = "ti,tca6416"; |
| + reg = <0x21>; |
| + gpio-controller; |
| + #gpio-cells = <2>; |
| + }; |
| + }; |
| + |
| + i2c@4 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <4>; |
| + rtc@54 { |
| + compatible = "nxp,pcf8563"; |
| + reg = <0x51>; |
| + }; |
| + }; |
| + |
| + i2c@7 { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + reg = <7>; |
| + hwmon@52 { |
| + compatible = "pmbus,ucd9248"; |
| + reg = <52>; |
| + }; |
| + hwmon@53 { |
| + compatible = "pmbus,ucd9248"; |
| + reg = <53>; |
| + }; |
| + hwmon@54 { |
| + compatible = "pmbus,ucd9248"; |
| + reg = <54>; |
| + }; |
| + }; |
| + }; |
| |
| -}; |
| + } ; |
| + ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 { |
| + compatible = "xlnx,ps7-iop-bus-config-1.00.a"; |
| + reg = <0xe0200000 0x1000>; |
| + } ; |
| + ps7_pl310_0: ps7-pl310@f8f02000 { |
| + arm,data-latency = <3 2 2>; |
| + arm,tag-latency = <2 2 2>; |
| + cache-level = <2>; |
| + cache-unified ; |
| + compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 2 4>; |
| + reg = <0xf8f02000 0x1000>; |
| + } ; |
| + ps7_qspi_0: ps7-qspi@e000d000 { |
| + clock-names = "ref_clk", "aper_clk"; |
| + clocks = <&clkc 10>, <&clkc 43>; |
| + compatible = "xlnx,ps7-qspi-1.00.a"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 19 4>; |
| + is-dual = <0>; |
| + num-chip-select = <1>; |
| + reg = <0xe000d000 0x1000>; |
| + xlnx,fb-clk = <0x1>; |
| + xlnx,qspi-mode = <0x0>; |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + flash@0 { |
| + compatible = "n25q128"; |
| + reg = <0x0>; |
| + spi-max-frequency = <50000000>; |
| + #address-cells = <1>; |
| + #size-cells = <1>; |
| + partition@qspi-fsbl-uboot { |
| + label = "qspi-fsbl-uboot"; |
| + reg = <0x0 0x100000>; |
| + }; |
| + partition@qspi-linux { |
| + label = "qspi-linux"; |
| + reg = <0x100000 0x500000>; |
| + }; |
| + partition@qspi-device-tree { |
| + label = "qspi-device-tree"; |
| + reg = <0x600000 0x20000>; |
| + }; |
| + partition@qspi-rootfs { |
| + label = "qspi-rootfs"; |
| + reg = <0x620000 0x5E0000>; |
| + }; |
| + partition@qspi-bitstream { |
| + label = "qspi-bitstream"; |
| + reg = <0xC00000 0x400000>; |
| + }; |
| + }; |
| |
| -&uart1 { |
| - status = "okay"; |
| -}; |
| + } ; |
| + ps7_qspi_linear_0: ps7-qspi-linear@fc000000 { |
| + clock-names = "ref_clk", "aper_clk"; |
| + clocks = <&clkc 10>, <&clkc 43>; |
| + compatible = "xlnx,ps7-qspi-linear-1.00.a"; |
| + reg = <0xfc000000 0x1000000>; |
| + } ; |
| + ps7_ram_0: ps7-ram@0 { |
| + compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 3 4>; |
| + reg = <0xfffc0000 0x40000>; |
| + } ; |
| + ps7_scugic_0: ps7-scugic@f8f01000 { |
| + #address-cells = <2>; |
| + #interrupt-cells = <3>; |
| + #size-cells = <1>; |
| + compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic"; |
| + interrupt-controller ; |
| + num_cpus = <2>; |
| + num_interrupts = <96>; |
| + reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>; |
| + } ; |
| + ps7_scutimer_0: ps7-scutimer@f8f00600 { |
| + clocks = <&clkc 4>; |
| + compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <1 13 0x301>; |
| + reg = <0xf8f00600 0x20>; |
| + } ; |
| + ps7_scuwdt_0: ps7-scuwdt@f8f00620 { |
| + clocks = <&clkc 4>; |
| + compatible = "xlnx,ps7-scuwdt-1.00.a"; |
| + device_type = "watchdog"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <1 14 0x301>; |
| + reg = <0xf8f00620 0xe0>; |
| + } ; |
| + ps7_sd_0: ps7-sdio@e0100000 { |
| + clock-frequency = <50000000>; |
| + clock-names = "clk_xin", "clk_ahb"; |
| + clocks = <&clkc 21>, <&clkc 32>; |
| + compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci-8.9a"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 24 4>; |
| + reg = <0xe0100000 0x1000>; |
| + xlnx,has-cd = <0x1>; |
| + xlnx,has-power = <0x0>; |
| + xlnx,has-wp = <0x1>; |
| + } ; |
| + ps7_slcr_0: ps7-slcr@f8000000 { |
| + compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr"; |
| + reg = <0xf8000000 0x1000>; |
| + clocks { |
| + #address-cells = <1>; |
| + #size-cells = <0>; |
| + clkc: clkc { |
| + #clock-cells = <1>; |
| + clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", |
| + "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", |
| + "lqspi", "smc", "pcap", "gem0", "gem1", |
| + "fclk0", "fclk1", "fclk2", "fclk3", "can0", |
| + "can1", "sdio0", "sdio1", "uart0", "uart1", |
| + "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", |
| + "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", |
| + "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", |
| + "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", |
| + "swdt", "dbg_trc", "dbg_apb"; |
| + compatible = "xlnx,ps7-clkc"; |
| + fclk-enable = <0xf>; |
| + ps-clk-frequency = <33333333>; |
| + } ; |
| + } ; |
| + } ; |
| + ps7_ttc_0: ps7-ttc@f8001000 { |
| + clocks = <&clkc 6>; |
| + compatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc"; |
| + interrupt-names = "ttc0", "ttc1", "ttc2"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 10 4>, <0 11 4>, <0 12 4>; |
| + reg = <0xf8001000 0x1000>; |
| + } ; |
| + ps7_uart_1: serial@e0001000 { |
| + clock-names = "ref_clk", "aper_clk"; |
| + clocks = <&clkc 24>, <&clkc 41>; |
| + compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps"; |
| + current-speed = <115200>; |
| + device_type = "serial"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 50 4>; |
| + port-number = <0>; |
| + reg = <0xe0001000 0x1000>; |
| + xlnx,has-modem = <0x0>; |
| + } ; |
| + ps7_usb_0: ps7-usb@e0002000 { |
| + clocks = <&clkc 28>; |
| + compatible = "xlnx,ps7-usb-1.00.a"; |
| + dr_mode = "host"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 21 4>; |
| + phy_type = "ulpi"; |
| + reg = <0xe0002000 0x1000>; |
| + xlnx,usb-reset = "MIO 7"; |
| + } ; |
| + ps7_wdt_0: ps7-wdt@f8005000 { |
| + clocks = <&clkc 45>; |
| + compatible = "xlnx,ps7-wdt-1.00.a"; |
| + device_type = "watchdog"; |
| + interrupt-parent = <&ps7_scugic_0>; |
| + interrupts = <0 9 1>; |
| + reg = <0xf8005000 0x1000>; |
| + reset = <0>; |
| + timeout = <10>; |
| + } ; |
| + } ; |
| +} ; |
