| From 350bf0e9833a06ef36a1c7e8593ca1446b4f4af8 Mon Sep 17 00:00:00 2001 |
| From: Wolfram Sang <wsa+renesas@sang-engineering.com> |
| Date: Wed, 28 May 2014 09:44:44 +0200 |
| Subject: i2c: rcar: reuse status bits as enable bits |
| |
| Status register and enable register are identical regarding their |
| layout. Use the bit definitions for both. |
| |
| Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> |
| Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> |
| Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> |
| Signed-off-by: Wolfram Sang <wsa@the-dreams.de> |
| (cherry picked from commit 3e3aabac443e25712a3788cf88cc188e13ca8b0e) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/i2c/busses/i2c-rcar.c | 17 ++++------------- |
| 1 file changed, 4 insertions(+), 13 deletions(-) |
| |
| diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c |
| index e16784124a41..4c46d1b1b61d 100644 |
| --- a/drivers/i2c/busses/i2c-rcar.c |
| +++ b/drivers/i2c/busses/i2c-rcar.c |
| @@ -59,7 +59,7 @@ |
| #define FSB (1 << 1) /* force stop bit */ |
| #define ESG (1 << 0) /* en startbit gen */ |
| |
| -/* ICMSR */ |
| +/* ICMSR (also for ICMIE) */ |
| #define MNR (1 << 6) /* nack received */ |
| #define MAL (1 << 5) /* arbitration lost */ |
| #define MST (1 << 4) /* sent a stop */ |
| @@ -68,23 +68,14 @@ |
| #define MDR (1 << 1) |
| #define MAT (1 << 0) /* slave addr xfer done */ |
| |
| -/* ICMIE */ |
| -#define MNRE (1 << 6) /* nack irq en */ |
| -#define MALE (1 << 5) /* arblos irq en */ |
| -#define MSTE (1 << 4) /* stop irq en */ |
| -#define MDEE (1 << 3) |
| -#define MDTE (1 << 2) |
| -#define MDRE (1 << 1) |
| -#define MATE (1 << 0) /* address sent irq en */ |
| - |
| |
| #define RCAR_BUS_PHASE_START (MDBS | MIE | ESG) |
| #define RCAR_BUS_PHASE_DATA (MDBS | MIE) |
| #define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB) |
| |
| -#define RCAR_IRQ_SEND (MNRE | MALE | MSTE | MATE | MDEE) |
| -#define RCAR_IRQ_RECV (MNRE | MALE | MSTE | MATE | MDRE) |
| -#define RCAR_IRQ_STOP (MSTE) |
| +#define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE) |
| +#define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR) |
| +#define RCAR_IRQ_STOP (MST) |
| |
| #define RCAR_IRQ_ACK_SEND (~(MAT | MDE)) |
| #define RCAR_IRQ_ACK_RECV (~(MAT | MDR)) |
| -- |
| 2.1.2 |
| |
