| From 5586c7e4bbdc487020c8ceb76af37ab1f0e9d144 Mon Sep 17 00:00:00 2001 |
| From: Ben Dooks <ben.dooks@codethink.co.uk> |
| Date: Tue, 24 Jun 2014 21:59:54 +0400 |
| Subject: ARM: shmobile: r8a7790: add internal PCI bridge nodes |
| |
| Add device nodes for the R8A7790 internal PCI bridge devices. |
| |
| Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> |
| Reviewed-by: Ian Molton <ian.molton@codethink.co.uk> |
| [Sergei: added several properties to the PCI bridge nodes] |
| Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> |
| Acked-by: Arnd Bergmann <arnd@arndb.de> |
| Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| |
| (cherry picked from commit ff4f3eb8b3386208944fe60b85e6cba4d338198e) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| arch/arm/boot/dts/r8a7790.dtsi | 60 ++++++++++++++++++++++++++++++++++++++++++ |
| 1 file changed, 60 insertions(+) |
| |
| diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi |
| index 994330e81a52..373d9a21c912 100644 |
| --- a/arch/arm/boot/dts/r8a7790.dtsi |
| +++ b/arch/arm/boot/dts/r8a7790.dtsi |
| @@ -930,6 +930,66 @@ |
| status = "disabled"; |
| }; |
| |
| + pci0: pci@ee090000 { |
| + compatible = "renesas,pci-r8a7790"; |
| + device_type = "pci"; |
| + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
| + reg = <0 0xee090000 0 0xc00>, |
| + <0 0xee080000 0 0x1100>; |
| + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; |
| + status = "disabled"; |
| + |
| + bus-range = <0 0>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; |
| + interrupt-map-mask = <0xff00 0 0 0x7>; |
| + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH |
| + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH |
| + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>; |
| + }; |
| + |
| + pci1: pci@ee0b0000 { |
| + compatible = "renesas,pci-r8a7790"; |
| + device_type = "pci"; |
| + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
| + reg = <0 0xee0b0000 0 0xc00>, |
| + <0 0xee0a0000 0 0x1100>; |
| + interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>; |
| + status = "disabled"; |
| + |
| + bus-range = <1 1>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>; |
| + interrupt-map-mask = <0xff00 0 0 0x7>; |
| + interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH |
| + 0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH |
| + 0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>; |
| + }; |
| + |
| + pci2: pci@ee0d0000 { |
| + compatible = "renesas,pci-r8a7790"; |
| + device_type = "pci"; |
| + clocks = <&mstp7_clks R8A7790_CLK_EHCI>; |
| + reg = <0 0xee0d0000 0 0xc00>, |
| + <0 0xee0c0000 0 0x1100>; |
| + interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; |
| + status = "disabled"; |
| + |
| + bus-range = <2 2>; |
| + #address-cells = <3>; |
| + #size-cells = <2>; |
| + #interrupt-cells = <1>; |
| + ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; |
| + interrupt-map-mask = <0xff00 0 0 0x7>; |
| + interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH |
| + 0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH |
| + 0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; |
| + }; |
| + |
| pciec: pcie@fe000000 { |
| compatible = "renesas,pcie-r8a7790"; |
| reg = <0 0xfe000000 0 0x80000>; |
| -- |
| 2.1.2 |
| |
