| From 0c448d5588d89d0b0dc3152c9cf672379a086599 Mon Sep 17 00:00:00 2001 |
| From: Geert Uytterhoeven <geert+renesas@glider.be> |
| Date: Thu, 21 May 2015 14:05:10 +0200 |
| Subject: [PATCH 245/326] pinctrl: Spelling s/reseved/reserved/ |
| |
| Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
| Reviewed-by: Simon Horman <horms+renesas@verge.net.au> |
| Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
| Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
| (cherry picked from commit 5b441eba3ab928ad1a2e9478fae6aa1397048860) |
| Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
| --- |
| drivers/pinctrl/nomadik/pinctrl-ab8505.c | 2 +- |
| drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 38 ++++++++++++++++---------------- |
| 2 files changed, 20 insertions(+), 20 deletions(-) |
| |
| diff --git a/drivers/pinctrl/nomadik/pinctrl-ab8505.c b/drivers/pinctrl/nomadik/pinctrl-ab8505.c |
| index bf0ef4ac376f..42c6e1f7886b 100644 |
| --- a/drivers/pinctrl/nomadik/pinctrl-ab8505.c |
| +++ b/drivers/pinctrl/nomadik/pinctrl-ab8505.c |
| @@ -286,7 +286,7 @@ alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = { |
| ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */ |
| ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */ |
| ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */ |
| - ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reseved */ |
| + ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reserved */ |
| ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */ |
| ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */ |
| ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */ |
| diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| index 6e9ed6fb087c..3ddf23ec9f0b 100644 |
| --- a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c |
| @@ -6125,7 +6125,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, |
| 1, 2, 2, 2, 3, 2, 1, 1, 1, 1, |
| 3, 2, 2, 2, 1, 2, 2, 2) { |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_SCIF1 [2] */ |
| FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, |
| @@ -6152,11 +6152,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, |
| FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4, |
| 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| /* SEL_VI1 [2] */ |
| FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| /* SEL_TMU [1] */ |
| FN_SEL_TMU1_0, FN_SEL_TMU1_1, |
| @@ -6174,7 +6174,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, |
| FN_SEL_SCIF0_3, FN_SEL_SCIF0_4, |
| 0, 0, 0, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_SCIF [1] */ |
| FN_SEL_SCIF_0, FN_SEL_SCIF_1, |
| @@ -6184,13 +6184,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| 0, 0, |
| /* SEL_CAN1 [2] */ |
| FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_SCIFA2 [1] */ |
| FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, |
| /* SEL_SCIF4 [2] */ |
| FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| /* SEL_ADG [1] */ |
| FN_SEL_ADG_0, FN_SEL_ADG_1, |
| @@ -6200,7 +6200,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| 0, 0, 0, |
| /* SEL_SCIFA5 [2] */ |
| FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_GPS [2] */ |
| FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, |
| @@ -6210,7 +6210,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0, |
| /* SEL_SIM [1] */ |
| FN_SEL_SIM_0, FN_SEL_SIM_1, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_SSI8 [1] */ |
| FN_SEL_SSI8_0, FN_SEL_SSI8_1, } |
| @@ -6240,7 +6240,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_MMC_0, FN_SEL_MMC_1, |
| /* SEL_SCIF5 [1] */ |
| FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| /* SEL_IIC2 [2] */ |
| FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, |
| @@ -6250,11 +6250,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| 0, 0, 0, |
| /* SEL_IIC0 [2] */ |
| FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, } |
| }, |
| { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32, |
| @@ -6268,7 +6268,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0, |
| /* SEL_DIS [2] */ |
| FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_RAD [1] */ |
| FN_SEL_RAD_0, FN_SEL_RAD_1, |
| @@ -6280,15 +6280,15 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, |
| FN_SEL_SCIF2_3, FN_SEL_SCIF2_4, |
| 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| /* SEL_SOF2 [3] */ |
| FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, |
| FN_SEL_SOF2_3, FN_SEL_SOF2_4, |
| 0, 0, 0, |
| - /* RESEVED [1] */ |
| + /* RESERVED [1] */ |
| 0, 0, |
| /* SEL_SSI1 [1] */ |
| FN_SEL_SSI1_0, FN_SEL_SSI1_1, |
| @@ -6296,11 +6296,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { |
| FN_SEL_SSI0_0, FN_SEL_SSI0_1, |
| /* SEL_SSP [2] */ |
| FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, |
| - /* RESEVED [2] */ |
| + /* RESERVED [2] */ |
| 0, 0, 0, 0, } |
| }, |
| { }, |
| -- |
| 2.6.2 |
| |