blob: 284d612cb63822a47e155d619852cebe09c836c6 [file] [log] [blame]
From d645564c36862c0e6f98228c22e88bc7b82d9916 Mon Sep 17 00:00:00 2001
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Date: Tue, 13 Mar 2018 16:18:20 +0100
Subject: [PATCH 1144/1795] clk: renesas: r8a77965: Replace DU2 clock
R-Car M3-N does not have the DU2 unit but it has DU3 instead.
Fix the module clock definition to reflect that.
Fixes: 7ce36da900c0a2ff ("clk: renesas: cpg-mssr: Add support for R-Car M3-N")
Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
(cherry picked from commit 1e04204eff99b520737315af882f7fb61a9443be)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 41e506ab557d..b1acfb60351c 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -173,7 +173,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("hsusb", 704, R8A77965_CLK_S3D4),
DEF_MOD("csi20", 714, R8A77965_CLK_CSI0),
DEF_MOD("csi40", 716, R8A77965_CLK_CSI0),
- DEF_MOD("du2", 722, R8A77965_CLK_S2D1),
+ DEF_MOD("du3", 721, R8A77965_CLK_S2D1),
DEF_MOD("du1", 723, R8A77965_CLK_S2D1),
DEF_MOD("du0", 724, R8A77965_CLK_S2D1),
DEF_MOD("lvds", 727, R8A77965_CLK_S2D1),
--
2.19.0