| From d8558ac8c93d429d65d7490b512a3a67e559d0d4 Mon Sep 17 00:00:00 2001 |
| From: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com> |
| Date: Wed, 18 Sep 2019 15:16:52 +0200 |
| Subject: PCI: Fix Intel ACS quirk UPDCR register address |
| |
| From: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com> |
| |
| commit d8558ac8c93d429d65d7490b512a3a67e559d0d4 upstream. |
| |
| According to documentation [0] the correct offset for the Upstream Peer |
| Decode Configuration Register (UPDCR) is 0x1014. It was previously defined |
| as 0x1114. |
| |
| d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports") |
| intended to enforce isolation between PCI devices allowing them to be put |
| into separate IOMMU groups. Due to the wrong register offset the intended |
| isolation was not fully enforced. This is fixed with this patch. |
| |
| Please note that I did not test this patch because I have no hardware that |
| implements this register. |
| |
| [0] https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf (page 325) |
| Fixes: d99321b63b1f ("PCI: Enable quirks for PCIe ACS on Intel PCH root ports") |
| Link: https://lore.kernel.org/r/7a3505df-79ba-8a28-464c-88b83eefffa6@kernkonzept.com |
| Signed-off-by: Steffen Liebergeld <steffen.liebergeld@kernkonzept.com> |
| Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
| Reviewed-by: Andrew Murray <andrew.murray@arm.com> |
| Acked-by: Ashok Raj <ashok.raj@intel.com> |
| Cc: stable@vger.kernel.org # v3.15+ |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/pci/quirks.c | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/drivers/pci/quirks.c |
| +++ b/drivers/pci/quirks.c |
| @@ -3819,7 +3819,7 @@ int pci_dev_specific_acs_enabled(struct |
| #define INTEL_BSPR_REG_BPPD (1 << 9) |
| |
| /* Upstream Peer Decode Configuration Register */ |
| -#define INTEL_UPDCR_REG 0x1114 |
| +#define INTEL_UPDCR_REG 0x1014 |
| /* 5:0 Peer Decode Enable bits */ |
| #define INTEL_UPDCR_REG_MASK 0x3f |
| |