blob: dba02da6fa344ca5dbeeab2bd106d06fd3332136 [file] [log] [blame]
# SPDX-License-Identifier: GPL-2.0-only
config CSKY
def_bool y
select ARCH_32BIT_OFF_T
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_USE_BUILTIN_BSWAP
select ARCH_USE_QUEUED_RWLOCKS
select ARCH_USE_QUEUED_SPINLOCKS
select ARCH_HAS_CURRENT_STACK_POINTER
select ARCH_INLINE_READ_LOCK if !PREEMPTION
select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
select COMMON_CLK
select CLKSRC_MMIO
select CSKY_MPINTC if CPU_CK860
select CSKY_MP_TIMER if CPU_CK860
select CSKY_APB_INTC
select DMA_DIRECT_REMAP
select IRQ_DOMAIN
select DW_APB_TIMER_OF
select GENERIC_IOREMAP
select GENERIC_LIB_ASHLDI3
select GENERIC_LIB_ASHRDI3
select GENERIC_LIB_LSHRDI3
select GENERIC_LIB_MULDI3
select GENERIC_LIB_CMPDI2
select GENERIC_LIB_UCMPDI2
select GENERIC_ALLOCATOR
select GENERIC_ATOMIC64
select GENERIC_CPU_DEVICES
select GENERIC_IRQ_CHIP
select GENERIC_IRQ_PROBE
select GENERIC_IRQ_SHOW
select GENERIC_IRQ_MULTI_HANDLER
select GENERIC_SCHED_CLOCK
select GENERIC_SMP_IDLE_THREAD
select GENERIC_TIME_VSYSCALL
select GENERIC_VDSO_32
select GENERIC_GETTIMEOFDAY
select GX6605S_TIMER if CPU_CK610
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_AUDITSYSCALL
select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
select HAVE_ARCH_JUMP_LABEL_RELATIVE
select HAVE_ARCH_MMAP_RND_BITS
select HAVE_ARCH_SECCOMP_FILTER
select HAVE_CONTEXT_TRACKING_USER
select HAVE_VIRT_CPU_ACCOUNTING_GEN
select HAVE_DEBUG_BUGVERBOSE
select HAVE_DEBUG_KMEMLEAK
select HAVE_DYNAMIC_FTRACE
select HAVE_DYNAMIC_FTRACE_WITH_REGS
select HAVE_GENERIC_VDSO
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_ERROR_INJECTION
select HAVE_FTRACE_MCOUNT_RECORD
select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZO
select HAVE_KERNEL_LZMA
select HAVE_KPROBES if !CPU_CK610
select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
select HAVE_KRETPROBES if !CPU_CK610
select HAVE_PERF_EVENTS
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
select HAVE_DMA_CONTIGUOUS
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS
select MAY_HAVE_SPARSE_IRQ
select MODULES_USE_ELF_RELA if MODULES
select OF
select OF_EARLY_FLATTREE
select PERF_USE_VMALLOC if CPU_CK610
select RTC_LIB
select TIMER_OF
select GENERIC_PCI_IOMAP
select HAVE_PCI
select PCI_DOMAINS_GENERIC if PCI
select PCI_SYSCALL if PCI
select PCI_MSI if PCI
select TRACE_IRQFLAGS_SUPPORT
config LOCKDEP_SUPPORT
def_bool y
config ARCH_SUPPORTS_UPROBES
def_bool y if !CPU_CK610
config CPU_HAS_CACHEV2
bool
config CPU_HAS_FPUV2
bool
config CPU_HAS_HILO
bool
config CPU_HAS_TLBI
bool
config CPU_HAS_LDSTEX
bool
help
For SMP, CPU needs "ldex&stex" instructions for atomic operations.
config CPU_NEED_TLBSYNC
bool
config CPU_NEED_SOFTALIGN
bool
config CPU_NO_USER_BKPT
bool
help
For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
So we need a 16bit instruction as user space bkpt, and it will cause an illegal
instruction exception.
In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
config GENERIC_CALIBRATE_DELAY
def_bool y
config GENERIC_CSUM
def_bool y
config GENERIC_HWEIGHT
def_bool y
config MMU
def_bool y
config STACKTRACE_SUPPORT
def_bool y
config TIME_LOW_RES
def_bool y
config CPU_TLB_SIZE
int
default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
default "1024" if (CPU_CK860)
config CPU_ASID_BITS
int
default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
default "12" if (CPU_CK860)
config L1_CACHE_SHIFT
int
default "4" if (CPU_CK610)
default "5" if (CPU_CK807 || CPU_CK810)
default "6" if (CPU_CK860)
config ARCH_MMAP_RND_BITS_MIN
default 8
# max bits determined by the following formula:
# VA_BITS - PAGE_SHIFT - 3
config ARCH_MMAP_RND_BITS_MAX
default 17
menu "Processor type and features"
choice
prompt "CPU MODEL"
default CPU_CK807
config CPU_CK610
bool "CSKY CPU ck610"
select CPU_NEED_TLBSYNC
select CPU_NEED_SOFTALIGN
select CPU_NO_USER_BKPT
config CPU_CK810
bool "CSKY CPU ck810"
select CPU_HAS_HILO
select CPU_NEED_TLBSYNC
config CPU_CK807
bool "CSKY CPU ck807"
select CPU_HAS_HILO
config CPU_CK860
bool "CSKY CPU ck860"
select CPU_HAS_TLBI
select CPU_HAS_CACHEV2
select CPU_HAS_LDSTEX
select CPU_HAS_FPUV2
endchoice
choice
prompt "PAGE OFFSET"
default PAGE_OFFSET_80000000
config PAGE_OFFSET_80000000
bool "PAGE OFFSET 2G (user:kernel = 2:2)"
config PAGE_OFFSET_A0000000
bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
endchoice
config PAGE_OFFSET
hex
default 0x80000000 if PAGE_OFFSET_80000000
default 0xa0000000 if PAGE_OFFSET_A0000000
choice
prompt "C-SKY PMU type"
depends on PERF_EVENTS
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
config CPU_PMU_NONE
bool "None"
config CSKY_PMU_V1
bool "Performance Monitoring Unit Ver.1"
endchoice
choice
prompt "Power Manager Instruction (wait/doze/stop)"
default CPU_PM_NONE
config CPU_PM_NONE
bool "None"
config CPU_PM_WAIT
bool "wait"
config CPU_PM_DOZE
bool "doze"
config CPU_PM_STOP
bool "stop"
endchoice
menuconfig HAVE_TCM
bool "Tightly-Coupled/Sram Memory"
depends on !COMPILE_TEST
help
The implementation are not only used by TCM (Tightly-Coupled Memory)
but also used by sram on SOC bus. It follow existed linux tcm
software interface, so that old tcm application codes could be
re-used directly.
if HAVE_TCM
config ITCM_RAM_BASE
hex "ITCM ram base"
default 0xffffffff
config ITCM_NR_PAGES
int "Page count of ITCM size: NR*4KB"
range 1 256
default 32
config HAVE_DTCM
bool "DTCM Support"
config DTCM_RAM_BASE
hex "DTCM ram base"
depends on HAVE_DTCM
default 0xffffffff
config DTCM_NR_PAGES
int "Page count of DTCM size: NR*4KB"
depends on HAVE_DTCM
range 1 256
default 32
endif
config CPU_HAS_VDSP
bool "CPU has VDSP coprocessor"
depends on CPU_HAS_FPU && CPU_HAS_FPUV2
config CPU_HAS_FPU
bool "CPU has FPU coprocessor"
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
config CPU_HAS_ICACHE_INS
bool "CPU has Icache invalidate instructions"
depends on CPU_HAS_CACHEV2
config CPU_HAS_TEE
bool "CPU has Trusted Execution Environment"
depends on CPU_CK810
config SMP
bool "Symmetric Multi-Processing (SMP) support for C-SKY"
depends on CPU_CK860
default n
config NR_CPUS
int "Maximum number of CPUs (2-32)"
range 2 32
depends on SMP
default "4"
config HIGHMEM
bool "High Memory Support"
depends on !CPU_CK610
select KMAP_LOCAL
default y
config ARCH_FORCE_MAX_ORDER
int "Maximum zone order"
default "11"
config DRAM_BASE
hex "DRAM start addr (the same with memory-section in dts)"
default 0x0
config HOTPLUG_CPU
bool "Support for hot-pluggable CPUs"
select GENERIC_IRQ_MIGRATION
depends on SMP
help
Say Y here to allow turning CPUs off and on. CPUs can be
controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
Say N if you want to disable CPU hotplug.
config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
depends on CPU_CK807 || CPU_CK810 || CPU_CK860
help
Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
deal with unaligned access by hardware.
endmenu
source "arch/csky/Kconfig.platforms"
source "kernel/Kconfig.hz"