firewire: ohci: be noisy about temporary and final regAccessFail events
If the retry loop needs to be engaged but succeeds in the end, print
how many tries it took.
Also, if regAccessFail happened transiently or terminally, dump the stack
to see in which context the event happened.
Plus a trivial adjustment of a parameter variable.
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 79bddf5..7f59511 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -326,7 +326,7 @@
static int param_quirks;
module_param_named(quirks, param_quirks, int, 0644);
-static int param_cycle_timer_hard_fail = 1;
+static bool param_cycle_timer_hard_fail = true;
module_param_named(cycle_timer_hard_fail, param_cycle_timer_hard_fail, bool, 0644);
static int param_sclk_retries = 20;
@@ -587,8 +587,14 @@
ret = check_reg_access_fail(ohci);
spin_unlock_irqrestore(&ohci->sclk_domain_reg_lock, flags);
- if (ret != -EAGAIN)
- return ret;
+ if (ret != -EAGAIN) {
+ if (i)
+ dev_notice(ohci->card.device,
+ "reg_rw_sclk took %d %s retries to %s register 0x%03x\n",
+ i, can_sleep ? "sleeping" : "busy",
+ read ? "read" : "write", offset);
+ goto out;
+ }
if (i == param_sclk_retries)
break;
if (can_sleep)
@@ -596,6 +602,8 @@
}
dev_err(ohci->card.device, "SClk is off, cannot %s register 0x%03x\n",
read ? "read" : "write", offset);
+ out:
+ dump_stack();
return ret;
}
@@ -1641,7 +1649,7 @@
struct fw_packet *packet, u32 csr)
{
struct fw_packet response;
- int tcode, length, ext_tcode, sel, try;
+ int tcode, length, ext_tcode, sel, try, err;
__be32 *payload, lock_old;
u32 lock_arg, lock_data, reg;
unsigned long flags;
@@ -1673,12 +1681,14 @@
for (try = 0; try < 20; try++) {
reg = reg_read(ohci, OHCI1394_CSRControl);
- if (check_reg_access_fail(ohci))
+ err = check_reg_access_fail(ohci);
+ if (err)
break;
if (reg & OHCI1394_CSRControl_csrDone) {
lock_old = cpu_to_be32(reg_read(ohci, OHCI1394_CSRData));
- if (check_reg_access_fail(ohci))
+ err = check_reg_access_fail(ohci);
+ if (err)
break;
fw_fill_response(&response, packet->header,
@@ -1687,8 +1697,13 @@
goto out_unlock;
}
}
-
- dev_err(ohci->card.device, "swap not done (CSR lock timeout)\n");
+ if (err == -EAGAIN) {
+ dev_err(ohci->card.device,
+ "SClk is off, cannot read CSRControl or CSRData\n");
+ dump_stack();
+ } else {
+ dev_err(ohci->card.device, "swap not done (CSR lock timeout)\n");
+ }
fw_fill_response(&response, packet->header, RCODE_BUSY, NULL, 0);
out_unlock:
@@ -1875,6 +1890,7 @@
return ret;
}
dev_err(ohci->card.device, "SClk is off, cannot read cycle timer\n");
+ dump_stack();
return ret;
}
@@ -3081,6 +3097,11 @@
ret = check_reg_access_fail(ohci);
if (ret == 0)
ohci->mc_channels = channels;
+ if (ret == -EAGAIN) {
+ dev_err(ohci->card.device,
+ "SClk is off, cannot write IRMultiChanMask\n");
+ dump_stack();
+ }
spin_unlock_irqrestore(&ohci->sclk_domain_reg_lock, flags);
return ret;
