| /* |
| * chorus2-i2s.h |
| * |
| */ |
| #ifndef CHORUS2I2S_H_ |
| #define CHORUS2I2S_H_ |
| |
| #include <linux/io.h> |
| |
| extern struct snd_soc_dai_driver chorus2_i2s_dai; |
| |
| #define I2S_OUT_BASE_ADDR 0x02017000 |
| |
| #define _I2S_OUT_INTERLEAVE_DATA_OFFSET 0x00 |
| |
| #define _I2S_OUT_CONTROL_OFFSET 0x04 |
| |
| #define _I2S_OUT_ACTIVE_CHAN_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_ACTIVE_CHAN_SHIFT 12 |
| #define _I2S_OUT_ACTIVE_CHAN_MASK 0x0000F000 |
| |
| #define _I2S_OUT_FRAME_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_FRAME_SHIFT 7 |
| #define _I2S_OUT_FRAME_MASK 0x00000180 |
| |
| #define _I2S_OUT_MASTER_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_MASTER_SHIFT 6 |
| #define _I2S_OUT_MASTER_MASK 0x00000040 |
| |
| #define _I2S_OUT_ACLK_SEL_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_ACLK_SEL_SHIFT 5 |
| #define _I2S_OUT_ACLK_SEL_MASK 0x00000020 |
| |
| #define _I2S_OUT_BCLK_EN_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_BCLK_EN_SHIFT 4 |
| #define _I2S_OUT_BCLK_EN_MASK 0x00000010 |
| |
| #define _I2S_OUT_LEFT_POL_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_LEFT_POL_SHIFT 3 |
| #define _I2S_OUT_LEFT_POL_MASK 0x00000008 |
| |
| #define _I2S_OUT_BCLK_POL_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_BCLK_POL_SHIFT 2 |
| #define _I2S_OUT_BCLK_POL_MASK 0x00000004 |
| |
| #define _I2S_OUT_PACKED_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_PACKED_SHIFT 1 |
| #define _I2S_OUT_PACKED_MASK 0x00000002 |
| |
| #define _I2S_OUT_ENABLE_OFFSET _I2S_OUT_CONTROL_OFFSET |
| #define _I2S_OUT_ENABLE_SHIFT 0 |
| #define _I2S_OUT_ENABLE_MASK 0x00000001 |
| |
| #define _I2S_OUT_SOFT_RESET_OFFSET 0x08 |
| #define _I2S_OUT_SOFT_RESET_SHIFT 0 |
| #define _I2S_OUT_SOFT_RESET_MASK 0x00000001 |
| |
| #define _I2S_OUT_CHANS_OFFSET 0x80 |
| #define _I2S_OUT_CHANS_STRIDE 0x20 |
| |
| #define _I2S_OUT_CHAN_DATA_OFFSET 0x00 |
| |
| #define _I2S_OUT_CHAN_CTRL_OFFSET 0x04 |
| |
| #define _I2S_OUT_CHAN_LRDATA_POL_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_LRDATA_POL_SHIFT 12 |
| #define _I2S_OUT_CHAN_LRDATA_POL_MASK 0x00001000 |
| |
| #define _I2S_OUT_CHAN_LRFORCE_DIS_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_LRFORCE_DIS_SHIFT 11 |
| #define _I2S_OUT_CHAN_LRFORCE_DIS_MASK 0x00000800 |
| |
| #define _I2S_OUT_CHAN_LOCK_DIS_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_LOCK_DIS_SHIFT 10 |
| #define _I2S_OUT_CHAN_LOCK_DIS_MASK 0x00000400 |
| |
| #define _I2S_OUT_CHAN_REPEAT_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_REPEAT_SHIFT 9 |
| #define _I2S_OUT_CHAN_REPEAT_MASK 0x00000200 |
| |
| #define _I2S_OUT_CHAN_PACKED_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_PACKED_SHIFT 8 |
| #define _I2S_OUT_CHAN_PACKED_MASK 0x00000100 |
| |
| #define _I2S_OUT_CHAN_FORMAT_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_FORMAT_SHIFT 7 |
| #define _I2S_OUT_CHAN_FORMAT_MASK 0x000000F0 |
| |
| #define _I2S_OUT_CHAN_MUSTBE1_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_MUSTB1_SHIFT 3 |
| #define _I2S_OUT_CHAN_MUSTB1_MASK 0x00000008 |
| |
| #define _I2S_OUT_CHAN_FLUSH_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_FLUSH_SHIFT 2 |
| #define _I2S_OUT_CHAN_FLUSH_MASK 0x00000004 |
| |
| #define _I2S_OUT_CHAN_PH_NSY_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_PH_NSY_SHIFT 1 |
| #define _I2S_OUT_CHAN_PH_NSY_MASK 0x00000002 |
| |
| #define _I2S_OUT_CHAN_RUN_OFFSET _I2S_OUT_CHAN_CTRL_OFFSET |
| #define _I2S_OUT_CHAN_RUN_SHIFT 0 |
| #define _I2S_OUT_CHAN_RUN_MASK 0x00000001 |
| |
| #define _I2S_OUT_CHAN_I_STATUS_OFFSET 0x08 |
| |
| #define _I2S_OUT_CHAN_I_ENABLE_OFFSET 0x0C |
| |
| #define _I2S_OUT_CHAN_I_CLEAR_OFFSET 0x10 |
| |
| #define _I2S_OUT_SAMPLE_COUNT_OFFSET 0x1C |
| |
| |
| /*Helper Macros (dont use outside of this file) */ |
| #define _REG_ADDRESS(REG) _##REG##_OFFSET |
| #define _REG_MASK(REG) _##REG##_MASK |
| #define _REG_SHIFT(REG) _##REG##_SHIFT |
| |
| #define I2S_OUT_WRITE_REG(REG, value) \ |
| iowrite32(value, (void *)I2S_OUT_BASE_ADDR + _REG_ADDRESS(REG)) |
| |
| #define I2S_OUT_READ_REG(REG) \ |
| ioread32((void *)I2S_OUT_BASE_ADDR + _REG_ADDRESS(REG)) |
| |
| #define I2S_OUT_GET_REG_FIELD(REG) \ |
| ((I2S_OUT_READ_REG(REG) & _REG_MASK(REG)) >> _REG_SHIFT(REG)) |
| |
| |
| /* Helper to be used externally */ |
| #define I2S_OUT_SET_REG_FIELD(REG, value) \ |
| {\ |
| u32 temp = I2S_OUT_READ_REG(REG); \ |
| I2S_OUT_SET_FIELD(temp, REG, value);\ |
| I2S_OUT_WRITE_REG(REG, temp);\ |
| } |
| |
| #define I2S_OUT_SET_FIELD(data, FIELD, value) \ |
| {\ |
| data &= ~_REG_MASK(FIELD);\ |
| data |= value << _REG_SHIFT(FIELD);\ |
| } |
| |
| static inline void I2S_OUT_RSET_CHAN_CONTROL(int channel, u32 value) |
| { |
| iowrite32(value, (void *)I2S_OUT_BASE_ADDR + _I2S_OUT_CHANS_OFFSET + |
| channel * _I2S_OUT_CHANS_STRIDE + |
| _REG_ADDRESS(I2S_OUT_CHAN_CTRL)); |
| } |
| |
| static inline u32 I2S_OUT_RGET_CHAN_CONTROL(int channel) |
| { |
| return ioread32((void *)I2S_OUT_BASE_ADDR + _I2S_OUT_CHANS_OFFSET + |
| channel * _I2S_OUT_CHANS_STRIDE + |
| _REG_ADDRESS(I2S_OUT_CHAN_CTRL)); |
| } |
| static inline void I2S_OUT_RSET_MAIN_CONTROL(u32 value) |
| { |
| iowrite32(value, (void *)I2S_OUT_BASE_ADDR + |
| _REG_ADDRESS(I2S_OUT_CONTROL)); |
| } |
| |
| static inline u32 I2S_OUT_RGET_MAIN_CONTROL(void) |
| { |
| return ioread32((void *)I2S_OUT_BASE_ADDR + |
| _REG_ADDRESS(I2S_OUT_CONTROL)); |
| } |
| |
| #endif /* CHORUS2I2S_H_ */ |