| Binding for discoverable-fixed-rate clock sources. |
| |
| This binding uses the common clock binding[1]. |
| |
| [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| |
| Required properties: |
| - compatible : shall be "specified-clock". |
| - #clock-cells : from common clock binding; shall be set to 0. |
| - bit-mask : Mask of bits in the field specifying the frequency. |
| - table : array of integer pairs defining register field values and |
| corresponding clock frequencies in Hz. |
| |
| Optional properties: |
| - reg : Base address of configuration register specifying the frequency. |
| - syscon-reg : Phandle to syscon node and offset of syscon register. |
| - bit-shift : Number of bits to shift the masked register value. |
| Defaults to (ffs(bit-mask) - 1) if absent. |
| - clock-accuracy : accuracy of clock in ppb (parts per billion). |
| Should be a single cell. |
| - clock-output-names : From common clock binding. |
| |
| NOTE: One of reg or syscon-reg must be provided. |
| |
| Examples: |
| clock { |
| compatible = "specified-clock"; |
| #clock-cells = <0>; |
| reg = <0x02004004 0x4>; /* CR_PERIP_RESET_CFG */ |
| bit-mask = <0x00000f00>; /* FXTAL */ |
| table = /* FXTAL Frequency */ |
| <0 16384000>, |
| <1 19200000>, |
| <2 24000000>, |
| <3 24576000>, |
| <4 26000000>, |
| <5 36000000>, |
| <6 36864000>, |
| <7 38400000>, |
| <8 40000000>; |
| clock-accuracy = <100>; |
| clock-output-names = "xtal1"; |
| }; |
| |
| clock { |
| compatible = "specified-clock"; |
| #clock-cells = <0>; |
| syscon-reg = <&perip_cr 0x4>; /* CR_PERIP_RESET_CFG */ |
| bit-mask = <0x00000f00>; /* FXTAL */ |
| table = /* FXTAL Frequency */ |
| <0 16384000>, |
| <1 19200000>, |
| <2 24000000>, |
| <3 24576000>, |
| <4 26000000>, |
| <5 36000000>, |
| <6 36864000>, |
| <7 38400000>, |
| <8 40000000>; |
| clock-accuracy = <100>; |
| clock-output-names = "xtal1"; |
| }; |