blob: a7cdb42fa8bda5ca456a28ce7842fd86aa81e3b6 [file] [log] [blame]
#ifndef __ASM_PCI_CHANNEL_H
#define __ASM_PCI_CHANNEL_H
/*
* This file essentially defines the interface between board
* specific PCI code and MIPS common PCI code. Should potentially put
* into include/asm/pci.h file.
*/
#include <linux/ioport.h>
#include <linux/pci.h>
/*
* Each pci channel is a top-level PCI bus seem by CPU. A machine with
* multiple PCI channels may have multiple PCI host controllers or a
* single controller supporting multiple channels.
*/
struct pci_controller {
struct pci_controller *next;
struct pci_bus *bus;
struct pci_ops *pci_ops;
struct resource *mem_resource;
unsigned long mem_offset;
struct resource *io_resource;
unsigned long io_offset;
/* For compatibility with current (as of July 2003) pciutils
and XFree86. Eventually will be removed. */
unsigned int need_domain_info;
int iommu;
};
/*
* Used by boards to register their PCI interfaces before the actual scanning.
*/
extern struct pci_controller * alloc_pci_controller(void);
extern void register_pci_controller(struct pci_controller *hose);
/*
* board supplied pci irq fixup routine
*/
extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
#endif /* __ASM_PCI_CHANNEL_H */