| /* |
| * Device Tree Source for the Salvator-X board |
| * |
| * Copyright (C) 2016 Renesas Electronics Corp. |
| * |
| * This file is licensed under the terms of the GNU General Public License |
| * version 2. This program is licensed "as is" without any warranty of any |
| * kind, whether express or implied. |
| */ |
| |
| /dts-v1/; |
| #include "r8a7796.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| |
| / { |
| model = "Renesas Salvator-X board based on r8a7796"; |
| compatible = "renesas,salvator-x", "renesas,r8a7796"; |
| |
| aliases { |
| serial0 = &scif2; |
| serial1 = &scif1; |
| ethernet0 = &avb; |
| }; |
| |
| chosen { |
| bootargs = "ignore_loglevel rw root=/dev/nfs cma=64M ip=dhcp"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@48000000 { |
| device_type = "memory"; |
| /* first 128MB is reserved for secure area. */ |
| reg = <0x0 0x48000000 0x0 0x78000000>; |
| }; |
| |
| memory@600000000 { |
| device_type = "memory"; |
| reg = <0x6 0x00000000 0x0 0x80000000>; |
| }; |
| |
| reg_1p8v: regulator0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "fixed-1.8V"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| reg_3p3v: regulator1 { |
| compatible = "regulator-fixed"; |
| regulator-name = "fixed-3.3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| vcc_sdhi0: regulator-vcc-sdhi0 { |
| compatible = "regulator-fixed"; |
| |
| regulator-name = "SDHI0 Vcc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| vccq_sdhi0: regulator-vccq-sdhi0 { |
| compatible = "regulator-gpio"; |
| |
| regulator-name = "SDHI0 VccQ"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; |
| gpios-states = <1>; |
| states = <3300000 1 |
| 1800000 0>; |
| }; |
| |
| vcc_sdhi3: regulator-vcc-sdhi3 { |
| compatible = "regulator-fixed"; |
| |
| regulator-name = "SDHI3 Vcc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| |
| vccq_sdhi3: regulator-vccq-sdhi3 { |
| compatible = "regulator-gpio"; |
| |
| regulator-name = "SDHI3 VccQ"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; |
| gpios-states = <1>; |
| states = <3300000 1 |
| 1800000 0>; |
| }; |
| }; |
| |
| &pfc { |
| pinctrl-0 = <&scif_clk_pins>; |
| pinctrl-names = "default"; |
| |
| avb_pins: avb { |
| groups = "avb_mdc"; |
| function = "avb"; |
| }; |
| |
| scif1_pins: scif1 { |
| groups = "scif1_data_a", "scif1_ctrl"; |
| function = "scif1"; |
| }; |
| |
| scif2_pins: scif2 { |
| groups = "scif2_data_a"; |
| function = "scif2"; |
| }; |
| scif_clk_pins: scif_clk { |
| groups = "scif_clk_a"; |
| function = "scif_clk"; |
| }; |
| |
| i2c2_pins: i2c2 { |
| groups = "i2c2_a"; |
| function = "i2c2"; |
| }; |
| |
| sdhi0_pins: sd0 { |
| groups = "sdhi0_data4", "sdhi0_ctrl"; |
| function = "sdhi0"; |
| power-source = <3300>; |
| }; |
| |
| sdhi0_pins_uhs: sd0_uhs { |
| groups = "sdhi0_data4", "sdhi0_ctrl"; |
| function = "sdhi0"; |
| power-source = <1800>; |
| }; |
| |
| sdhi2_pins: sd2 { |
| groups = "sdhi2_data8", "sdhi2_ctrl"; |
| function = "sdhi2"; |
| power-source = <3300>; |
| }; |
| |
| sdhi2_pins_uhs: sd2_uhs { |
| groups = "sdhi2_data8", "sdhi2_ctrl"; |
| function = "sdhi2"; |
| power-source = <1800>; |
| }; |
| |
| sdhi3_pins: sd3 { |
| groups = "sdhi3_data4", "sdhi3_ctrl"; |
| function = "sdhi3"; |
| power-source = <3300>; |
| }; |
| |
| sdhi3_pins_uhs: sd3_uhs { |
| groups = "sdhi3_data4", "sdhi3_ctrl"; |
| function = "sdhi3"; |
| power-source = <1800>; |
| }; |
| }; |
| |
| &avb { |
| pinctrl-0 = <&avb_pins>; |
| pinctrl-names = "default"; |
| renesas,no-ether-link; |
| phy-handle = <&phy0>; |
| status = "okay"; |
| |
| phy0: ethernet-phy@0 { |
| rxc-skew-ps = <1500>; |
| reg = <0>; |
| interrupt-parent = <&gpio2>; |
| interrupts = <11 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <16666666>; |
| }; |
| |
| &extalr_clk { |
| clock-frequency = <32768>; |
| }; |
| |
| &sdhi0 { |
| pinctrl-0 = <&sdhi0_pins>; |
| pinctrl-1 = <&sdhi0_pins_uhs>; |
| pinctrl-names = "default", "state_uhs"; |
| |
| vmmc-supply = <&vcc_sdhi0>; |
| vqmmc-supply = <&vccq_sdhi0>; |
| cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| sd-uhs-sdr50; |
| status = "okay"; |
| }; |
| |
| &sdhi2 { |
| /* used for on-board 8bit eMMC */ |
| pinctrl-0 = <&sdhi2_pins>; |
| pinctrl-1 = <&sdhi2_pins_uhs>; |
| pinctrl-names = "default", "state_uhs"; |
| |
| vmmc-supply = <®_3p3v>; |
| vqmmc-supply = <®_1p8v>; |
| bus-width = <8>; |
| non-removable; |
| status = "okay"; |
| }; |
| |
| &sdhi3 { |
| pinctrl-0 = <&sdhi3_pins>; |
| pinctrl-1 = <&sdhi3_pins_uhs>; |
| pinctrl-names = "default", "state_uhs"; |
| |
| vmmc-supply = <&vcc_sdhi3>; |
| vqmmc-supply = <&vccq_sdhi3>; |
| cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; |
| wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; |
| bus-width = <4>; |
| sd-uhs-sdr50; |
| status = "okay"; |
| }; |
| |
| &scif1 { |
| pinctrl-0 = <&scif1_pins>; |
| pinctrl-names = "default"; |
| |
| uart-has-rtscts; |
| status = "okay"; |
| }; |
| |
| &scif2 { |
| pinctrl-0 = <&scif2_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |
| |
| &scif_clk { |
| clock-frequency = <14745600>; |
| }; |
| |
| &i2c2 { |
| pinctrl-0 = <&i2c2_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &wdt0 { |
| timeout-sec = <60>; |
| status = "okay"; |
| }; |
| |
| &i2c_dvfs { |
| status = "okay"; |
| }; |
| |
| &i2c4 { |
| status = "okay"; |
| |
| clock-frequency = <100000>; |
| |
| video_receiver@70 { |
| compatible = "adi,adv7482"; |
| reg = <0x70>; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@10 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg = <10>; |
| |
| adv7482_txa: endpoint@1 { |
| reg = <1>; |
| clock-lanes = <0>; |
| data-lanes = <1 2 3 4>; |
| remote-endpoint = <&csi40_in>; |
| }; |
| }; |
| }; |
| |
| /* |
| This is a HACK and is in reality the same dev as 0x70 |
| But due to V4L2 limitations we need it to be two subdevices |
| to test VIN + CSI2. There will be two instances of the |
| ADV7482 driver controlling the same chip, but *most* parts |
| are independent of the other and i2c is used in a bad way |
| so it sort of works to test. |
| */ |
| video_receiver@34 { |
| compatible = "adi,adv7482"; |
| reg = <0x34>; |
| |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@11 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg = <11>; |
| |
| adv7482_txb: endpoint@1 { |
| reg = <1>; |
| clock-lanes = <0>; |
| data-lanes = <1>; |
| remote-endpoint = <&csi20_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| &vin0 { |
| status = "okay"; |
| }; |
| |
| &vin1 { |
| status = "okay"; |
| }; |
| |
| &vin2 { |
| status = "okay"; |
| }; |
| |
| &vin3 { |
| status = "okay"; |
| }; |
| |
| &vin4 { |
| status = "okay"; |
| }; |
| |
| &vin5 { |
| status = "okay"; |
| }; |
| |
| &vin6 { |
| status = "okay"; |
| }; |
| |
| &vin7 { |
| status = "okay"; |
| }; |
| |
| &csi20 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg = <0>; |
| |
| csi20_in: endpoint@0 { |
| reg = <0>; |
| clock-lanes = <0>; |
| data-lanes = <1>; |
| remote-endpoint = <&adv7482_txb>; |
| }; |
| }; |
| }; |
| }; |
| |
| &csi40 { |
| status = "okay"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| reg = <0>; |
| |
| csi40_in: endpoint@0 { |
| reg = <0>; |
| clock-lanes = <0>; |
| data-lanes = <1 2 3 4>; |
| remote-endpoint = <&adv7482_txa>; |
| }; |
| }; |
| }; |
| }; |