| From 108b434e1db643a84d439f8820afb95ab8bcb83c Mon Sep 17 00:00:00 2001 |
| From: Daniel Vetter <daniel.vetter@ffwll.ch> |
| Date: Wed, 5 Jun 2013 13:34:21 +0200 |
| Subject: drm/i915: fix up pch pll enabling for pixel multipliers |
| |
| We have a nice comment saying that the pixel multiplier only sticks |
| once the vco is on and stable. The only problem is that the enable bit |
| wasn't set at all. This patch fixes this and so brings the ilk+ pch |
| pll code in line with the i8xx/i9xx pll code. Or at least improves |
| matters a lot. |
| |
| This should fix sdvo on ilk-ivb for low-res modes. |
| |
| Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit 959e16d65d808602cd88b82530626f964f684c05) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/intel_display.c | 4 ++-- |
| 1 file changed, 2 insertions(+), 2 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c |
| index e29ce6b31f67..6b475793cb66 100644 |
| --- a/drivers/gpu/drm/i915/intel_display.c |
| +++ b/drivers/gpu/drm/i915/intel_display.c |
| @@ -5660,7 +5660,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc, |
| else |
| dpll |= PLL_REF_INPUT_DREFCLK; |
| |
| - return dpll; |
| + return dpll | DPLL_VCO_ENABLE; |
| } |
| |
| static int ironlake_crtc_mode_set(struct drm_crtc *crtc, |
| @@ -5722,7 +5722,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, |
| &fp, &reduced_clock, |
| has_reduced_clock ? &fp2 : NULL); |
| |
| - intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE; |
| + intel_crtc->config.dpll_hw_state.dpll = dpll; |
| intel_crtc->config.dpll_hw_state.fp0 = fp; |
| if (has_reduced_clock) |
| intel_crtc->config.dpll_hw_state.fp1 = fp2; |
| -- |
| 1.8.5.rc3 |
| |
