| From 9f81ba8b1f2cd1be32a3ff69f057041f987a05b6 Mon Sep 17 00:00:00 2001 |
| From: Shobhit Kumar <shobhit.kumar@intel.com> |
| Date: Tue, 27 Aug 2013 15:12:25 +0300 |
| Subject: drm/i915: Parse the MIPI related VBT Block and store relevant info |
| |
| Initial parsing of the VBT MIPI block. For now, just store the panel id |
| if found. |
| |
| Note: Again there seems to be no documentation for this piece of lore. |
| The doc situation for byt+ is just a bad joke :( |
| |
| Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com> |
| Signed-off-by: Jani Nikula <jani.nikula@intel.com> |
| Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> |
| (cherry picked from commit d17c5443cf445b308a207cf127209f4702791323) |
| Signed-off-by: Darren Hart <dvhart@linux.intel.com> |
| --- |
| drivers/gpu/drm/i915/i915_drv.h | 5 +++++ |
| drivers/gpu/drm/i915/intel_bios.c | 16 +++++++++++++++ |
| drivers/gpu/drm/i915/intel_bios.h | 41 +++++++++++++++++++++++++++++++++++++++ |
| 3 files changed, 62 insertions(+) |
| |
| diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h |
| index e2628579dcbe..2cf9dabbfe5d 100644 |
| --- a/drivers/gpu/drm/i915/i915_drv.h |
| +++ b/drivers/gpu/drm/i915/i915_drv.h |
| @@ -1065,6 +1065,11 @@ struct intel_vbt_data { |
| int edp_bpp; |
| struct edp_power_seq edp_pps; |
| |
| + /* MIPI DSI */ |
| + struct { |
| + u16 panel_id; |
| + } dsi; |
| + |
| int crt_ddc_pin; |
| |
| int child_dev_num; |
| diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c |
| index 53f2bed8bc5f..6668873fb3a8 100644 |
| --- a/drivers/gpu/drm/i915/intel_bios.c |
| +++ b/drivers/gpu/drm/i915/intel_bios.c |
| @@ -569,6 +569,21 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
| } |
| |
| static void |
| +parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) |
| +{ |
| + struct bdb_mipi *mipi; |
| + |
| + mipi = find_section(bdb, BDB_MIPI); |
| + if (!mipi) { |
| + DRM_DEBUG_KMS("No MIPI BDB found"); |
| + return; |
| + } |
| + |
| + /* XXX: add more info */ |
| + dev_priv->vbt.dsi.panel_id = mipi->panel_id; |
| +} |
| + |
| +static void |
| parse_device_mapping(struct drm_i915_private *dev_priv, |
| struct bdb_header *bdb) |
| { |
| @@ -745,6 +760,7 @@ intel_parse_bios(struct drm_device *dev) |
| parse_device_mapping(dev_priv, bdb); |
| parse_driver_features(dev_priv, bdb); |
| parse_edp(dev_priv, bdb); |
| + parse_mipi(dev_priv, bdb); |
| |
| if (bios) |
| pci_unmap_rom(pdev, bios); |
| diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h |
| index e088d6f0956a..6e9250eb9c2c 100644 |
| --- a/drivers/gpu/drm/i915/intel_bios.h |
| +++ b/drivers/gpu/drm/i915/intel_bios.h |
| @@ -104,6 +104,7 @@ struct vbios_data { |
| #define BDB_LVDS_LFP_DATA 42 |
| #define BDB_LVDS_BACKLIGHT 43 |
| #define BDB_LVDS_POWER 44 |
| +#define BDB_MIPI 50 |
| #define BDB_SKIP 254 /* VBIOS private block, ignore */ |
| |
| struct bdb_general_features { |
| @@ -618,4 +619,44 @@ int intel_parse_bios(struct drm_device *dev); |
| #define PORT_IDPC 8 |
| #define PORT_IDPD 9 |
| |
| +/* MIPI DSI panel info */ |
| +struct bdb_mipi { |
| + u16 panel_id; |
| + u16 bridge_revision; |
| + |
| + /* General params */ |
| + u32 dithering:1; |
| + u32 bpp_pixel_format:1; |
| + u32 rsvd1:1; |
| + u32 dphy_valid:1; |
| + u32 resvd2:28; |
| + |
| + u16 port_info; |
| + u16 rsvd3:2; |
| + u16 num_lanes:2; |
| + u16 rsvd4:12; |
| + |
| + /* DSI config */ |
| + u16 virt_ch_num:2; |
| + u16 vtm:2; |
| + u16 rsvd5:12; |
| + |
| + u32 dsi_clock; |
| + u32 bridge_ref_clk; |
| + u16 rsvd_pwr; |
| + |
| + /* Dphy Params */ |
| + u32 prepare_cnt:5; |
| + u32 rsvd6:3; |
| + u32 clk_zero_cnt:8; |
| + u32 trail_cnt:5; |
| + u32 rsvd7:3; |
| + u32 exit_zero_cnt:6; |
| + u32 rsvd8:2; |
| + |
| + u32 hl_switch_cnt; |
| + u32 lp_byte_clk; |
| + u32 clk_lane_switch_cnt; |
| +} __attribute__((packed)); |
| + |
| #endif /* _I830_BIOS_H_ */ |
| -- |
| 1.8.5.rc3 |
| |